Add signal from mgmt to start testing
diff --git a/verilog/dv/gpio_test/gpio_test.c b/verilog/dv/gpio_test/gpio_test.c
index b595303..df13d8f 100644
--- a/verilog/dv/gpio_test/gpio_test.c
+++ b/verilog/dv/gpio_test/gpio_test.c
@@ -49,13 +49,8 @@
reg_spimaster_config = 0xa002; // Enable, prescaler = 2,
// connect to housekeeping SPI
- // Connect the housekeeping SPI to the SPI master
- // so that the CSB line is not left floating. This allows
- // all of the GPIO pins to be used for user functions.
-
- // Configure Pin 22 as user output
- // Observe counter value in the testbench
- reg_mprj_io_22 = GPIO_MODE_USER_STD_OUTPUT;
+ // This is to signal when the code is done to the test bench
+ reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT;
reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_NOPULL;
reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_NOPULL;
@@ -65,6 +60,11 @@
reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_NOPULL;
reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_NOPULL;
+ // Configure Pin 22 as user output
+ // Observe counter value in the testbench
+ reg_mprj_io_22 = GPIO_MODE_USER_STD_OUTPUT;
+
+
// Configure LA probes as outputs from the cpu
reg_la0_oenb = reg_la0_iena = 0x00000000; // [31:0]
reg_la1_oenb = reg_la1_iena = 0x00000000; // [63:32]
@@ -75,6 +75,9 @@
reg_la2_data = 0x00000000;
reg_la3_data = 0x00000000;
+ // Set bit 0 when done
+ reg_mprj_datal = 0x00000001;
+
/* Apply configuration */
reg_mprj_xfer = 1;
while (reg_mprj_xfer == 1);
diff --git a/verilog/dv/gpio_test/gpio_test_tb.v b/verilog/dv/gpio_test/gpio_test_tb.v
index 6f4ddf8..e6aae0f 100644
--- a/verilog/dv/gpio_test/gpio_test_tb.v
+++ b/verilog/dv/gpio_test/gpio_test_tb.v
@@ -30,12 +30,11 @@
wire gpio;
wire [37:0] mprj_io;
- wire mprj_io_22;
+ wire mprj_io_22 = mprj_io[22];
- assign mprj_io_22 = mprj_io[22];
- // assign mprj_io_0 = {mprj_io[8:4],mprj_io[2:0]};
+ wire mprj_io_0 = mprj_io[0];
- assign mprj_io[3] = (CSB == 1'b1) ? 1'b1 : 1'bz;
+ //assign mprj_io[3] = (CSB == 1'b1) ? 1'b1 : 1'bz;
// assign mprj_io[3] = 1'b1;
// External clock is used by default. Make this artificially fast for the
@@ -71,8 +70,8 @@
initial begin
- // Wait until after the reset
- #170000;
+ wait(mprj_io_0 == 1'b1);
+ $display("Saw bit 0");
$dumpfile("gpio_test.vcd");
$dumpvars(0, gpio_test_tb);
@@ -149,29 +148,12 @@
//Testing 32B Single Port Memories
for(i = 8; i < 11; i = i + 1) begin
sel = i;
-
+
//Write 1 to addr1 using GPIO Pins
gpio_scan = 1;
gpio_sram_load = 0;
in_data = {sel, 16'd1, 32'd1, 1'b0, 1'b0, 4'd15, 16'd0, 32'd0, 1'b0, 1'b0, 4'd0};
-
- for(j = 0; j < 112; j = j + 1) begin
- gpio_in = in_data[111 - j];
- #25;
- end
-
- gpio_scan = 0;
- global_csb = 0;
- #25;
- global_csb = 1;
- gpio_sram_load = 1;
- #25;
-
- //Read addr1
- gpio_scan = 1;
- gpio_sram_load = 0;
- in_data = {sel, 16'd1, 32'd0, 1'b0, 1'b1, 4'd0, 16'd0, 32'd0, 1'b0, 1'b0, 4'd0};
-
+
for(j = 0; j < 112; j = j + 1) begin
gpio_in = in_data[111 - j];
#25;
@@ -182,8 +164,25 @@
#25;
global_csb = 1;
gpio_sram_load = 1;
- #25;
-
+ #25;
+
+ //Read addr1
+ gpio_scan = 1;
+ gpio_sram_load = 0;
+ in_data = {sel, 16'd1, 32'd0, 1'b0, 1'b1, 4'd0, 16'd0, 32'd0, 1'b0, 1'b0, 4'd0};
+
+ for(j = 0; j < 112; j = j + 1) begin
+ gpio_in = in_data[111 - j];
+ #25;
+ end
+
+ gpio_scan = 0;
+ global_csb = 0;
+ #25;
+ global_csb = 1;
+ gpio_sram_load = 1;
+ #25;
+
#75;
gpio_sram_load = 0;
gpio_scan = 1;
@@ -196,29 +195,29 @@
//Testing 64b Single Port Memory
sel = 11;
-
+
//Write 1 to addr1 using GPIO Pins
gpio_scan = 1;
gpio_sram_load = 0;
in_data = {sel, 16'd1, 32'd1, 1'b0, 1'b0, 4'd15, 16'd0, 32'd0, 1'b0, 1'b0, 4'd0};
-
+
for(j = 0; j < 112; j = j + 1) begin
gpio_in = in_data[111 - j];
#25;
end
-
+
gpio_scan = 0;
global_csb = 0;
#10;
global_csb = 1;
gpio_sram_load = 1;
- #10;
-
+ #10;
+
//Read addr1
gpio_scan = 1;
gpio_sram_load = 0;
in_data = {sel, 16'd1, 32'd0, 1'b0, 1'b1, 4'd0, 16'd0, 32'd0, 1'b0, 1'b0, 4'd0};
-
+
for(j = 0; j < 112; j = j + 1) begin
gpio_in = in_data[111 - j];
#25;
@@ -229,8 +228,8 @@
#25;
global_csb = 1;
gpio_sram_load = 1;
- #25;
-
+ #25;
+
#75;
gpio_sram_load = 0;
gpio_scan = 1;
@@ -238,18 +237,11 @@
out_data[111 - j] = mprj_io_22;
#25;
end
-
+
#25;
#25; $finish;
- end
-
- initial begin
- // Observe Output pin 22
- wait(mprj_io_22 == 8'h01);
- $display("Saw bit 22");
- //$finish;
- end
+ end
initial begin
RSTB <= 1'b0;
