)]}'
{
  "commit": "02225fde60636a20d44e4be9bcc85376684a7999",
  "tree": "8350df5130009a55482f6df54b3c565149f67295",
  "parents": [
    "3db503544fb07642eca32e063509144f25b6bdbd"
  ],
  "author": {
    "name": "dinesha",
    "email": "dineshannayya@users.noreply.github.com",
    "time": "Tue Jun 08 15:19:39 2021 +0000"
  },
  "committer": {
    "name": "dinesha",
    "email": "dineshannayya@users.noreply.github.com",
    "time": "Tue Jun 08 15:19:39 2021 +0000"
  },
  "message": "digital core added into svn",
  "tree_diff": [
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "6b23b18d0296d8eb251429c7013996157b903bae",
      "new_mode": 33261,
      "new_path": "verilog/rtl/digital_core/filelist_rtl.f"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "68309a1718a83640a6e715b88f2df5d260612e0d",
      "new_mode": 33261,
      "new_path": "verilog/rtl/digital_core/run_modelsim"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "bc5721a076b9cf2dbb0e0fe1cc218d55e50ef8ab",
      "new_mode": 33188,
      "new_path": "verilog/rtl/digital_core/src/digital_core.sv"
    },
    {
      "type": "modify",
      "old_id": "2b96bfc760dffda28c8def336ba3f890a31f456d",
      "old_mode": 33188,
      "old_path": "verilog/rtl/lib/sync_fifo.sv",
      "new_id": "874adb3a17684e51330dc82987a4e0eaf18b9d98",
      "new_mode": 33188,
      "new_path": "verilog/rtl/lib/sync_fifo.sv"
    },
    {
      "type": "modify",
      "old_id": "8ecd58c30fc0f89679856c687e3f0cbfd554b6eb",
      "old_mode": 33188,
      "old_path": "verilog/rtl/lib/wb_crossbar.v",
      "new_id": "ed7a5ae2536bdbe68f257198cda1198d3519d2f8",
      "new_mode": 33188,
      "new_path": "verilog/rtl/lib/wb_crossbar.v"
    },
    {
      "type": "modify",
      "old_id": "b9eacde1b6c34fe8f80118190f4c2ece0dc205e3",
      "old_mode": 33261,
      "old_path": "verilog/rtl/sdram_ctrl/src/core/sdrc_core.v",
      "new_id": "82381d12a1d6ec24cec958c89073e7c29b89ee7c",
      "new_mode": 33261,
      "new_path": "verilog/rtl/sdram_ctrl/src/core/sdrc_core.v"
    },
    {
      "type": "modify",
      "old_id": "077f6886e7aee9a0c0f5bca6e96fe52238cc0c20",
      "old_mode": 33261,
      "old_path": "verilog/rtl/sdram_ctrl/src/top/sdrc_top.v",
      "new_id": "00d9606f15e98473b22b56bd4f15f786f910f8a4",
      "new_mode": 33261,
      "new_path": "verilog/rtl/sdram_ctrl/src/top/sdrc_top.v"
    },
    {
      "type": "modify",
      "old_id": "c5857659c2d7317b8b86a73bd4a3a706519378a3",
      "old_mode": 33261,
      "old_path": "verilog/rtl/sdram_ctrl/src/wb2sdrc/wb2sdrc.v",
      "new_id": "4a0f74b7050a14e4a7ec3d909ed0b75fb35a07f0",
      "new_mode": 33261,
      "new_path": "verilog/rtl/sdram_ctrl/src/wb2sdrc/wb2sdrc.v"
    },
    {
      "type": "modify",
      "old_id": "9943f002ab72ad0260c56e612935cc539182481b",
      "old_mode": 33188,
      "old_path": "verilog/rtl/spi_master/src/spim_top.sv",
      "new_id": "079c7e9a3f1b6c0c0ac180a39e81c99d131efc6f",
      "new_mode": 33188,
      "new_path": "verilog/rtl/spi_master/src/spim_top.sv"
    },
    {
      "type": "modify",
      "old_id": "abc712796b8ca08b3c09e16d9b1e0558a8d41853",
      "old_mode": 33188,
      "old_path": "verilog/rtl/syntacore/scr1/src/top/scr1_dmem_wb.sv",
      "new_id": "24691d439780ce4c56f42767684489d3d1b6ee4e",
      "new_mode": 33188,
      "new_path": "verilog/rtl/syntacore/scr1/src/top/scr1_dmem_wb.sv"
    }
  ]
}