tree 9f719376b948c83a8913b66bad57cb09b98b7f54
parent c5265b80121a1cfca92cd2fdea7bdc375fb860bd
author Tim Edwards <tim@opencircuitdesign.com> 1601172496 -0400
committer Tim Edwards <tim@opencircuitdesign.com> 1601172496 -0400

Some minor updates to the testbench Makefiles and verilog.