)]}'
{
  "commit": "a115bddf527cad3f04f350a54d0bfbadc55a51ae",
  "tree": "a365a35fdb9b81352f62714bcc36b7f3594ff9b6",
  "parents": [
    "c941188321f73b10402a6a141675e5eda9f80c03"
  ],
  "author": {
    "name": "manarabdelaty",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Tue Dec 01 11:19:12 2020 +0200"
  },
  "committer": {
    "name": "manarabdelaty",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Tue Dec 01 11:19:12 2020 +0200"
  },
  "message": "Added GL simulations\n\n- updated mgmt_core gl netlist to the one with tri-state buffers\n- updated mgmt_core and digital_pll power pin names to match the names in the powered GL netlist\n",
  "tree_diff": [
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "f896dc09f985c261cc89b7b1b2ac8a72cdea7276",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/gpio_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "f1935ddd23a82bfe1189a8d369f618055ebe7416",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/gpio_gl/README"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "1e1e48acaa85405c3ae781259aa358389f3d78f7",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/gpio_gl/gpio.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "49a34671d28cd993264cb204f812c246e66e6c0a",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/gpio_gl/gpio_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "be47dd2153472e68e9de6042db94315a9beee3b5",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/hkspi_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "826bf595973cd2f0d5a26538ffee217feff91758",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/hkspi_gl/hkspi.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "88b8edff8ab4c69dc2eabe1a87a8e936ccaf35ef",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/hkspi_gl/hkspi_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "16e340e1dcf9ffa6c0d672c83cb174d54a7674d0",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/mem_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "7fbf8ada899486d7b518e558c8482dc3591c0e7f",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/mem_gl/mem.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "c6334689bb023eccef721ba641e590767494e71b",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/mem_gl/mem_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "b1d5ec91cd87b2170efe6257c9c6a8bac779e863",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/mprj_ctrl_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "75b41d466a1317922579fb807d40b17f2da161f1",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/mprj_ctrl_gl/mprj_ctrl.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "a907b55f6a6698b2d30fe1070b8c0269fdb1f7bc",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/mprj_ctrl_gl/mprj_ctrl_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "f043a9a25d333f3abd0061decb7afbddf8e07e80",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/pass_thru_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "d31b31fbf6fe7b48cb509d909eaa61ea9c30dedb",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/pass_thru_gl/pass_thru.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "e2587eed02a9de3fec361227aeecc46bc10cf3ed",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/pass_thru_gl/pass_thru_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "f5e0730e490db7e0f9f77e50bb1e5a2fdd917a90",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/perf_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "0d83518828ce19875aaa29c5e343c32f0cbb8013",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/perf_gl/perf.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "be9410a0e3498b77cb0ec49dbaa0e7a8cd0b38e0",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/perf_gl/perf_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "da4e1c4c81bb1ca7c00b292f2e4ae446b9867360",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/pll_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "b74860b58acd9304cbe1d9f61f064bde92190423",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/pll_gl/pll.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "149517a1412d2887bd32be16851d826f42a0daf5",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/pll_gl/pll_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "f1b324823b502e10423733a676fc7c9e0d838fd7",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/storage_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "b5f7408ec3a8ef89e4b6633bc4e9d3db20f10359",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/storage_gl/storage.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "ae1209a0274a32c7c6632cb6353bfe6bf3dc39ba",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/storage_gl/storage_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "0cd46546aeccc2ec4be6fdc1c27925c2c65fcb78",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/sysctrl_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "3d2cefde527a995e94499321f219c5b8705b52ec",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/sysctrl_gl/sysctrl.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "8b33e6b0b97af2ef5c498fddfeb4d5f6e359c31e",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/sysctrl_gl/sysctrl_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "73cecf5249ea03e65e20a392e3d3e94a0dee7a5f",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/timer2_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "a8c65e051068d4670d0691c0d882ae8c68556613",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/timer2_gl/timer2.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "00f3280f920975be488378ed8156ab103d28e4ef",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/timer2_gl/timer2_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "92e809f104a15d2b45e62038c4f54d7f7fdf40fe",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/timer_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "c3a8dc45527b9a2e3e754e06c15f82f56f610460",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/timer_gl/timer.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "30904d622bcebe039de75f45edae473f35c406af",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/timer_gl/timer_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "004a8763cd2052d90fea4614fef1bc7a84a1b2d4",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/uart_gl/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "3f8d4c991e4bffd441656b0857002520d6809d86",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/uart_gl/uart.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "b03459103dc1751607fb165cbd0e62e51a821230",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/mgmt_soc/uart_gl/uart_tb.v"
    },
    {
      "type": "modify",
      "old_id": "dcdce4639bef0a377d938a90d9cefb7e08f0cd89",
      "old_mode": 33188,
      "old_path": "verilog/gl/mgmt_core.v.gz",
      "new_id": "f26ccea63af5dee08ae692c0adcc3544cd79e4e8",
      "new_mode": 33188,
      "new_path": "verilog/gl/mgmt_core.v.gz"
    },
    {
      "type": "modify",
      "old_id": "bd3a167cc972f3977b8a0188a5ad7912addc914a",
      "old_mode": 33188,
      "old_path": "verilog/rtl/caravel.v",
      "new_id": "46cfdfd06c28f12df6153f3652df804b99e0501e",
      "new_mode": 33188,
      "new_path": "verilog/rtl/caravel.v"
    },
    {
      "type": "modify",
      "old_id": "2f3fc2ad4d80b83a5060f7fc0697f44f9102ab27",
      "old_mode": 33188,
      "old_path": "verilog/rtl/digital_pll.v",
      "new_id": "9840a7dc9519c1058c25514952c1e77983fe127f",
      "new_mode": 33188,
      "new_path": "verilog/rtl/digital_pll.v"
    },
    {
      "type": "modify",
      "old_id": "2f8b45dc75fc2f68382f8311d09ffee8dcf650ec",
      "old_mode": 33188,
      "old_path": "verilog/rtl/mgmt_core.v",
      "new_id": "56ba46b72af576ae0a8959f00667c826bac54ec6",
      "new_mode": 33188,
      "new_path": "verilog/rtl/mgmt_core.v"
    }
  ]
}