diff --git a/verilog/rtl/caravel.v b/verilog/rtl/caravel.v
index 08a6241..2ee50bc 100644
--- a/verilog/rtl/caravel.v
+++ b/verilog/rtl/caravel.v
@@ -35,29 +35,34 @@
 
 `ifdef GL
 	`include "gl/mgmt_core.v"
+	`include "gl/digital_pll.v"
+	`include "gl/DFFRAM.v"
+	`include "gl/storage.v"
+	`include "gl/user_id_programming.v"
+	`include "gl/chip_io.v"
 `else
 	`include "mgmt_soc.v"
 	`include "housekeeping_spi.v"
 	`include "caravel_clocking.v"
 	`include "mgmt_core.v"
+	`include "digital_pll.v"
+	`include "DFFRAM.v"
+	`include "DFFRAMBB.v"
+	`include "storage.v"
+	`include "user_id_programming.v"
+	`include "clock_div.v"
+	`include "storage_bridge_wb.v"
+	`include "mprj_io.v"
+	`include "chip_io.v"
 `endif
 
-`include "digital_pll.v"
+`include "sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v"
 `include "mgmt_protect.v"
 `include "mgmt_protect_hv.v"
-`include "mprj_io.v"
-`include "chip_io.v"
-`include "user_id_programming.v"
 `include "user_project_wrapper.v"
 `include "gpio_control_block.v"
-`include "clock_div.v"
 `include "simple_por.v"
-`include "storage_bridge_wb.v"
-`include "DFFRAM.v"
-`include "DFFRAMBB.v"
 `include "sram_1rw1r_32_256_8_sky130.v"
-`include "storage.v"
-`include "sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v"
 
 /*------------------------------*/
 /* Include user project here	*/
@@ -638,8 +643,8 @@
 	.USER_PROJECT_ID(USER_PROJECT_ID)
     ) user_id_value (
 `ifdef USE_POWER_PINS
-	.vdd1v8(vccd),
-	.vss(vssd),
+	.VPWR(vccd),
+	.VGND(vssd),
 `endif
 	.mask_rev(mask_rev)
     );