)]}'
{
  "id": "ab42e743f6263cee39baf968e2ea6c5ca28fe71c",
  "entries": [
    {
      "mode": 16384,
      "type": "tree",
      "id": "748fd8041b45dd2f95e438dbf520ad19e22efb4d",
      "name": "arch"
    },
    {
      "mode": 16384,
      "type": "tree",
      "id": "5595f52398cdf233a22aaad3be8ec5143d5a7182",
      "name": "config"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "dc3d2f3a82e0e641cdb5a2235a3465961cfba9b0",
      "name": "design_variables.yml"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "fbab9f38d08194be49bb01b54b93380ae36c545a",
      "name": "generate_fabric.openfpga"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "124dbcda84bfabd85033a88558b42de446c75558",
      "name": "generate_testbench.openfpga"
    },
    {
      "mode": 16384,
      "type": "tree",
      "id": "76ac21085d3991b5b29aeca4a4b4fe0e34adcbe5",
      "name": "micro_benchmark"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "8ffe5bbe3e7bec1aca0b2f840399a5bebb143cb6",
      "name": "process_top_def.sh"
    },
    {
      "mode": 16384,
      "type": "tree",
      "id": "deca77d684055c6ab47247549598d110896d39d1",
      "name": "sc_verilog"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "ed261f0188fb3daa4ad3242005a3aa391eda757e",
      "name": "user_project_wrapper_empty.def"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "b17859e4464ad3da516615c8688454f8b97ee90d",
      "name": "user_project_wrapper_template.def"
    }
  ]
}
