| ,design,design_name,config,runtime,DIEAREA_mm^2,CellPer_mm^2,(Cell/mm^2)/Core_Util,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY |
| 0,/project/openlane/accelerator_top,accelerator_top,16-12_03-56,0h16m8s,1.388832,16386.431188221468,71245.35299226725,-1,1489.0,22758,0,0,0,0,0,0,0,10,0,1500765,224071,-24.31,-42.96,0.0,-15.57,0.0,-46526.74,-75958.36,0.0,-20147.49,0.0,1193512575,0.0,24.2,22.6,0.53,0.01,-1,22537,23125,2861,3449,0,0,0,22758,140,130,43,594,682,3205,1985,2797,5773,4572,24,854,17587,0,18441,50.0,20.0,20,2,6,23,1,153.6,153.18,0.27,0,sky130_fd_sc_hd,4,0 |
