)]}'
{
  "commit": "bc03551d8505ed018aad9cfbc77661ea6cfd8260",
  "tree": "718ce2ea2a15f4518858f4e7c5ca4899d2a2c1b3",
  "parents": [
    "1feaa105552f68fd33c41a21731685ec858f18b0"
  ],
  "author": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Mon Nov 23 11:16:08 2020 -0500"
  },
  "committer": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Mon Nov 23 11:16:08 2020 -0500"
  },
  "message": "Split the high voltage part of the mgmt_protect.v module into its own\nmodule called mgmt_protect_hv.v so that it can be synthesized separately\ninto a hard macro, then included into the mgmt_protect.v block.\n",
  "tree_diff": [
    {
      "type": "delete",
      "old_id": "d42a22f016da023b58673bbb78876ffc38f78cb7",
      "old_mode": 33188,
      "old_path": "ngspice/.simple_por.spice.swp",
      "new_id": "0000000000000000000000000000000000000000",
      "new_mode": 0,
      "new_path": "/dev/null"
    },
    {
      "type": "modify",
      "old_id": "3832f6748aec261aa9850c047d8906e8ae82f1b7",
      "old_mode": 33188,
      "old_path": "verilog/rtl/caravel.v",
      "new_id": "130a35ce92bc967b69af4328783a645113bc3b99",
      "new_mode": 33188,
      "new_path": "verilog/rtl/caravel.v"
    },
    {
      "type": "modify",
      "old_id": "6368ae458e0b140f1120014ec7667c6926852fa7",
      "old_mode": 33188,
      "old_path": "verilog/rtl/mgmt_protect.v",
      "new_id": "d285a91c866b3b2187d6e3a0bd5b2337117f0fba",
      "new_mode": 33188,
      "new_path": "verilog/rtl/mgmt_protect.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "9c8cabe7248af9c3750e8e1808853e1da7d9e125",
      "new_mode": 33188,
      "new_path": "verilog/rtl/mgmt_protect_hv.v"
    }
  ]
}