)]}'
{
  "commit": "68e0363b0541a1cfd61500c8074b60480ea2cf5d",
  "tree": "7cb2b164f76a7977b3ebd9e56cc448b2eebfc69d",
  "parents": [
    "2517fa8538d616830340da4984502271fb902f19"
  ],
  "author": {
    "name": "Manar",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Mon Nov 09 13:25:13 2020 +0200"
  },
  "committer": {
    "name": "Manar",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Mon Nov 09 13:25:13 2020 +0200"
  },
  "message": "Added power pins to the custom memory cells\n\n- connected mem_wb to power (guarded by lvs)\n- updated defines.v to use the custom memory\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "176a5492a19e2d3928fd8df45ba63e9716895ff8",
      "old_mode": 33188,
      "old_path": "verilog/rtl/DFFRAM.v",
      "new_id": "24f78e869218f0284eed9c248ef0aa1abb5ffc7c",
      "new_mode": 33188,
      "new_path": "verilog/rtl/DFFRAM.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "12eb781be63865db94eedfcb8026b9c9fb1eb0b7",
      "new_mode": 33188,
      "new_path": "verilog/rtl/DFFRAMBB.v"
    },
    {
      "type": "modify",
      "old_id": "23fb906ef02f9c3e5d15b1a5e209735490b8d0eb",
      "old_mode": 33188,
      "old_path": "verilog/rtl/caravel.v",
      "new_id": "5dacab8e07035d8cad0fc60a1244c4890aea82bf",
      "new_mode": 33188,
      "new_path": "verilog/rtl/caravel.v"
    },
    {
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      "old_mode": 33188,
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      "new_mode": 33188,
      "new_path": "verilog/rtl/defines.v"
    },
    {
      "type": "modify",
      "old_id": "4f6891e6ec6294660031047b2e44ad2a914b2101",
      "old_mode": 33188,
      "old_path": "verilog/rtl/mem_wb.v",
      "new_id": "6e8799099e66ac6d400e32a863d75b5a708a22e5",
      "new_mode": 33188,
      "new_path": "verilog/rtl/mem_wb.v"
    },
    {
      "type": "modify",
      "old_id": "cf0793d41709c2a7c076221bf8223319f9ee880d",
      "old_mode": 33188,
      "old_path": "verilog/rtl/mgmt_soc.v",
      "new_id": "d5fbd92e9517e300369f6af878722d9c952a9558",
      "new_mode": 33188,
      "new_path": "verilog/rtl/mgmt_soc.v"
    }
  ]
}