diff --git a/README.md b/README.md
index 1232c21..83139d6 100644
--- a/README.md
+++ b/README.md
@@ -20,7 +20,7 @@
 The repoo contains a [sample mega project](/verilog/rtl/mprj_counter.v) that contains a binary 32-bit up counter.  </br>
 
 <p align=”center”>
-<img src="/doc/counter_32.png" width="40%" height="40%">
+<img src="/doc/counter_32.png" width="50%" height="50%">
 </p>
 
 The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: