)]}'
{
  "commit": "f46273f52e5206d287aea34dcc1489867dcfd170",
  "tree": "b7c3a19f79a630988806d008a45536f608767336",
  "parents": [
    "ec9b536c863b8b0adc16cd87e7e054f4a1a812e7"
  ],
  "author": {
    "name": "Ahmed Ghazy",
    "email": "ax3ghazy@aucegypt.edu",
    "time": "Sat Oct 31 23:48:35 2020 +0200"
  },
  "committer": {
    "name": "Ahmed Ghazy",
    "email": "ax3ghazy@aucegypt.edu",
    "time": "Sat Oct 31 23:48:35 2020 +0200"
  },
  "message": "Fix for the synthesis warnings about iomem_rdata\n\n- Works by assigning iomem_rdata_pre inside one always block with a\n  generate block outside, providing the needed signals\n- TODO: handle some scattered conflict warnings here and there in the\n  synthesis log about other signals\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5ca05539d2f6d6e8dc69862f01e752567f04ef48",
      "old_mode": 33188,
      "old_path": "verilog/rtl/mprj_ctrl.v",
      "new_id": "f9f75ec791e9b165988707b010d89038c9006df7",
      "new_mode": 33188,
      "new_path": "verilog/rtl/mprj_ctrl.v"
    }
  ]
}