)]}'
{
  "commit": "6f8481a75d66f6c41ca5c22e12073b9a3d524344",
  "tree": "60a65c55301a76d45c4efc92d3bbe7cb2c8adf96",
  "parents": [
    "ff71a9f6ebab1ab0eb381b9355da09cc0dd3af1a"
  ],
  "author": {
    "name": "manarabdelaty",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Tue Dec 29 16:06:02 2020 +0200"
  },
  "committer": {
    "name": "manarabdelaty",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Tue Dec 29 16:06:02 2020 +0200"
  },
  "message": "Updated TB and user_project verilog views\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "91ad1eecf77493155558c633e6d831367dc41a00",
      "old_mode": 33188,
      "old_path": "verilog/dv/caravel/user_proj_example/io_ports/Makefile",
      "new_id": "b8e9719021575b8eeb4388d99497c5395d24faaa",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/user_proj_example/io_ports/Makefile"
    },
    {
      "type": "modify",
      "old_id": "abba119b4baf282993bbeefc24027589abe7182c",
      "old_mode": 33188,
      "old_path": "verilog/dv/caravel/user_proj_example/io_ports/io_ports_tb.v",
      "new_id": "ea4463738a859d56a28c663db5426d8b75732705",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/user_proj_example/io_ports/io_ports_tb.v"
    },
    {
      "type": "delete",
      "old_id": "a6b419c63e09be0f33f49f982fb096a8831293f1",
      "old_mode": 33261,
      "old_path": "verilog/dv/caravel/user_proj_example/sw_n5/test.bin",
      "new_id": "0000000000000000000000000000000000000000",
      "new_mode": 0,
      "new_path": "/dev/null"
    },
    {
      "type": "modify",
      "old_id": "14a4f94564c74a517b0d62c72ef11826a82fb03f",
      "old_mode": 33188,
      "old_path": "verilog/dv/caravel/user_proj_example/sw_n5/test.c",
      "new_id": "b5f6822a56d61cb0dd88497b10a051d505f82440",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/user_proj_example/sw_n5/test.c"
    },
    {
      "type": "delete",
      "old_id": "8cfe5df0c2b78b931826dca8fafc0f51116e1251",
      "old_mode": 33261,
      "old_path": "verilog/dv/caravel/user_proj_example/sw_n5/test.elf",
      "new_id": "0000000000000000000000000000000000000000",
      "new_mode": 0,
      "new_path": "/dev/null"
    },
    {
      "type": "delete",
      "old_id": "69f44d9f7b29e68b036253ed89c4dc3f3c531dc1",
      "old_mode": 33261,
      "old_path": "verilog/dv/caravel/user_proj_example/sw_n5/test.hex",
      "new_id": "0000000000000000000000000000000000000000",
      "new_mode": 0,
      "new_path": "/dev/null"
    },
    {
      "type": "delete",
      "old_id": "7b1b9e125b90879ba21dca9f44e2aa3b938f9742",
      "old_mode": 33188,
      "old_path": "verilog/dv/caravel/user_proj_example/sw_n5/test.lst",
      "new_id": "0000000000000000000000000000000000000000",
      "new_mode": 0,
      "new_path": "/dev/null"
    },
    {
      "type": "modify",
      "old_id": "d3bff51d5bca7ad0ee4600ac3f4a7d9eff81ebbe",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_project/user_project_wrapper.v",
      "new_id": "4ffde1544df4913495f7cb64016c4a3d263b3560",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_project/user_project_wrapper.v"
    },
    {
      "type": "modify",
      "old_id": "d3bff51d5bca7ad0ee4600ac3f4a7d9eff81ebbe",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_project_wrapper.v",
      "new_id": "4ffde1544df4913495f7cb64016c4a3d263b3560",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_project_wrapper.v"
    }
  ]
}
