)]}' { "commit": "e9970d4b83daf39cf150df46c8124fa9d3217253", "tree": "2447fc294c6c8ac7901b55f90d6d32674fe259d5", "parents": [ "c454c648373258968ce045ce5a623fff93a5e140" ], "author": { "name": "manarabdelaty", "email": "manarabdelatty@aucegypt.edu", "time": "Sat Dec 26 00:25:24 2020 +0200" }, "committer": { "name": "manarabdelaty", "email": "manarabdelatty@aucegypt.edu", "time": "Sat Dec 26 00:25:24 2020 +0200" }, "message": "Updated layout\n", "tree_diff": [ { "type": "modify", "old_id": "7f6c4067a7953c86fba202e126b4e61b1d4dcf95", "old_mode": 33188, "old_path": ".travisCI/runPrecheck.sh", "new_id": "7f6c4067a7953c86fba202e126b4e61b1d4dcf95", "new_mode": 33261, "new_path": ".travisCI/runPrecheck.sh" }, { "type": "modify", "old_id": "fb4720fde99efbfaa5dfb51661dc0e4ddfd4b024", "old_mode": 33188, "old_path": "def/user_project_wrapper.def", "new_id": "c8bbd20b5331a39e76cf906c0a0df9b0864eb669", "new_mode": 33188, "new_path": "def/user_project_wrapper.def" }, { "type": "modify", "old_id": "4856ab8b30503ba682881cb95fcc0be23ad0fd37", "old_mode": 33188, "old_path": "gds/caravel.gds.gz", "new_id": "9b2f12ff0bb9076723af8ba44f961bca0942a911", "new_mode": 33188, "new_path": "gds/caravel.gds.gz" }, { "type": "modify", "old_id": "dfd40951a498c13121418efdde0f1a6f21779ce9", "old_mode": 33188, "old_path": "gds/user_project_wrapper.gds.gz", "new_id": "eca2b3efe54b1a88c0ad88ceaa9aefa8f1d3d147", "new_mode": 33188, "new_path": "gds/user_project_wrapper.gds.gz" }, { "type": "modify", "old_id": "97edda550bf08f94b1286a4b07cde534d53b38fb", "old_mode": 33188, "old_path": "lef/user_project_wrapper.lef", "new_id": "c03e3ef034805aaf78c450892a9544a8f7fbc85a", "new_mode": 33188, "new_path": "lef/user_project_wrapper.lef" }, { "type": "modify", "old_id": "9aa0a8f9894d07d8d2cbd60f8446f034385886bd", "old_mode": 33188, "old_path": "mag/user_project_wrapper.mag", "new_id": "cadd025f53c6fa82b0d962dac819bb6fde0fa012", "new_mode": 33188, "new_path": "mag/user_project_wrapper.mag" }, { "type": "modify", "old_id": "170900433337bf7d1027c5382af6b9baec973d4e", "old_mode": 33188, "old_path": "verilog/dv/caravel/user_proj_example/Makefile", "new_id": "8ec38c27a355cab79480163508a956654a3484a9", "new_mode": 33188, "new_path": "verilog/dv/caravel/user_proj_example/Makefile" }, { "type": "modify", "old_id": "bd68c35287b107233214c62831210adecc395ec8", "old_mode": 33188, "old_path": "verilog/dv/caravel/user_proj_example/and2/and2.c", "new_id": "d96745ec6594ab75f17f781b5fd24454cf2382f1", "new_mode": 33188, "new_path": "verilog/dv/caravel/user_proj_example/and2/and2.c" }, { "type": "modify", "old_id": "43b016dbd3429c62a25993c9f722534423c1d617", "old_mode": 33188, "old_path": "verilog/dv/caravel/user_proj_example/and2/and2_tb.v", "new_id": "1d0eae5ea9d99fd1df105e1455f76c981457cd08", "new_mode": 33188, "new_path": "verilog/dv/caravel/user_proj_example/and2/and2_tb.v" }, { "type": "delete", "old_id": "968a74b46df9c0bc629bd54d747e40c63581c2dd", "old_mode": 33188, "old_path": "verilog/dv/caravel/user_proj_example/la_test1/Makefile", "new_id": "0000000000000000000000000000000000000000", "new_mode": 0, "new_path": "/dev/null" }, { "type": "delete", "old_id": "9759ed739a2478391da2f78e3bdb632b48452c8d", "old_mode": 33188, "old_path": "verilog/dv/caravel/user_proj_example/la_test1/la_test1.c", "new_id": "0000000000000000000000000000000000000000", "new_mode": 0, "new_path": "/dev/null" }, { "type": "delete", "old_id": "210098fd2daa1249d31de4e5d84e9c7c78d154ce", "old_mode": 33188, "old_path": "verilog/dv/caravel/user_proj_example/la_test1/la_test1_tb.v", "new_id": "0000000000000000000000000000000000000000", "new_mode": 0, "new_path": "/dev/null" }, { "type": "delete", "old_id": "4980a080390009b9ad9b3e4014931b18acfa077e", "old_mode": 33188, "old_path": "verilog/dv/caravel/user_proj_example/la_test2/Makefile", "new_id": "0000000000000000000000000000000000000000", "new_mode": 0, "new_path": "/dev/null" }, { "type": "delete", "old_id": "0267d252e5a02ccc98bb9c19d3bc82f93ef2e70a", "old_mode": 33188, "old_path": "verilog/dv/caravel/user_proj_example/la_test2/la_test2.c", "new_id": "0000000000000000000000000000000000000000", "new_mode": 0, "new_path": "/dev/null" }, { "type": "delete", "old_id": "b9e5c806bbab20cfa1243a6d409900dc5dfd234a", "old_mode": 33188, "old_path": "verilog/dv/caravel/user_proj_example/la_test2/la_test2_tb.v", "new_id": "0000000000000000000000000000000000000000", "new_mode": 0, "new_path": "/dev/null" }, { "type": "modify", "old_id": "d356fb852daec5e7b7c1ea95ad3dd3bb6db2b7fe", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/cbx_1__0_.v", "new_id": "d5883eb74eb047d8d244f9d12ea346b09563148a", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/cbx_1__0_.v" }, { "type": "modify", "old_id": "4782bd2e81c0f6bc88c3afb77d1625b16e35edc5", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/cbx_1__1_.v", "new_id": "f2c6745883ba9efbf4976dc06d9511cd9843bf9b", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/cbx_1__1_.v" }, { "type": "modify", "old_id": "2603e6b2ac445ccd2503bce564160acc7fd3757b", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/cbx_1__2_.v", "new_id": "6029dadbde904f347a64b031c67852660f6b2fbd", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/cbx_1__2_.v" }, { "type": "modify", "old_id": "817a83e563f3263b6cb26bfae4501dfec93b4fad", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/cby_0__1_.v", "new_id": "5c93cd0f18904f740b80417dc21a695022ec8c7b", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/cby_0__1_.v" }, { "type": "modify", "old_id": "7d511e492593f4193e82897aad96f4cf417de8fa", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/cby_1__1_.v", "new_id": "a690c02b135a5f343bbe6c9113bed7c09d9b2883", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/cby_1__1_.v" }, { "type": "modify", "old_id": "30c45e1bea7c98a8d353e24b3fa29f9b9df5129b", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/cby_2__1_.v", "new_id": "6395cd18984e7c53afcec919d97cc0bd36e06b89", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/cby_2__1_.v" }, { "type": "modify", "old_id": "27ca13858c10308cf81d0e7cd234ffc809353b2d", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/fpga_core.v", "new_id": "54bbaf0c3ea86e8d01f412e015ca5cf05b8ea610", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/fpga_core.v" }, { "type": "modify", "old_id": "112923b4dc97445f4825d8ad2c2a9bc5e51ea24b", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/sb_0__0_.v", "new_id": "b6c443a33eef3c65ba1163759a515e9f902880d8", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/sb_0__0_.v" }, { "type": "modify", "old_id": "b67459dff6ff2ef998c1d7e301fc84828fb703c5", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/sb_0__1_.v", "new_id": "a97294dea2bbf2c3dca71daa968ebd800775f7c1", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/sb_0__1_.v" }, { "type": "modify", "old_id": "1296095b166976ebe12588b8363df05f16406d4b", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/sb_0__2_.v", "new_id": "de5fa4e0ddd297cde2d7df6aca9f450a3385363b", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/sb_0__2_.v" }, { "type": "modify", "old_id": "cdc002fd8ca087881e44a6604835a9364d0f45b1", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/sb_1__0_.v", "new_id": "60aa17e5d1b4f2a1b1878d169f6b12afad9fad92", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/sb_1__0_.v" }, { "type": "modify", "old_id": "01929ead96974bafc81f7611ca52cf0fb5a4b0f5", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/sb_1__1_.v", "new_id": "9bfdec7943ca02b47705b5b1c381a7db65a2c61d", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/sb_1__1_.v" }, { "type": "modify", "old_id": "207dd71eabbd8def73838e40e64c814d22d10915", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/sb_1__2_.v", "new_id": "28f1b52adec448ba4896b03af82c8a595224ad8c", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/sb_1__2_.v" }, { "type": "modify", "old_id": "5ccc748c6278eb8621bb292243cfc44c97bc363d", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/sb_2__0_.v", "new_id": "fa43a99b39692d70372796f5c1acc7202207dbda", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/sb_2__0_.v" }, { "type": "modify", "old_id": "571ee62b322d1f64bfc0c7defd66782d1a4b5f84", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/sb_2__1_.v", "new_id": "a20235e1ad877e4ed7605af47d9c54bd44693a7b", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/sb_2__1_.v" }, { "type": "modify", "old_id": "aba26bc1c8a8e540d677f3b7b4226e72ee9d65e7", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/sb_2__2_.v", "new_id": "237ee43c9bf7d903a21d5139ea6696990ddc88ba", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/sb_2__2_.v" }, { "type": "modify", "old_id": "e447afb51b78b7b009fb5482a26b6e92a60927f5", "old_mode": 33188, "old_path": "verilog/gl/user_project/gl/user_project_wrapper.v", "new_id": "a9b61564c0a1f0aafae2dc5faf78f47a37df65f7", "new_mode": 33188, "new_path": "verilog/gl/user_project/gl/user_project_wrapper.v" }, { "type": "modify", "old_id": "e447afb51b78b7b009fb5482a26b6e92a60927f5", "old_mode": 33188, "old_path": "verilog/gl/user_project_wrapper.v", "new_id": "a9b61564c0a1f0aafae2dc5faf78f47a37df65f7", "new_mode": 33188, "new_path": "verilog/gl/user_project_wrapper.v" }, { "type": "modify", "old_id": "66e4563995bc906a82fbcd0c811531bad9105aa5", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/fabric_netlists.v", "new_id": "25c17017b47030fd9363fd678fc9eaa4ad73d7ce", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/fabric_netlists.v" }, { "type": "modify", "old_id": "553230fd1f48822036d9c65e601dd34bd487ef2e", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/fpga_core.v", "new_id": "6e4609fa474db9e4d83f9f85676c5fdbb925d178", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/fpga_core.v" }, { "type": "modify", "old_id": "f429a74931870352026e9fdb16bf1f172b22aa34", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/cbx_1__0_.v", "new_id": "eb5f1abf96cee90b79c89f1ce1a69e33814e476f", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/cbx_1__0_.v" }, { "type": "modify", "old_id": "c863c5dd69bc657771ca9634c278e0784c590207", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/cbx_1__1_.v", "new_id": "53e9d44fdb0607b7a4f10115f1fc60d0b5fd4ef4", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/cbx_1__1_.v" }, { "type": "modify", "old_id": "123d0f6d29b75051a1ee9f2113cf36377842b095", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/cbx_1__2_.v", "new_id": "928ff8b52aad55573766fb3ad2bffd909ef68f34", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/cbx_1__2_.v" }, { "type": "modify", "old_id": "1ece5a4464ee5e433af3c6f5621cd6c903068cc1", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/cby_0__1_.v", "new_id": "9f17cd252abf8efea3e764c6fa7a13a30be5a76d", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/cby_0__1_.v" }, { "type": "modify", "old_id": "977522e4986e481c058dfccc7aaeb75795b2ae00", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/cby_1__1_.v", "new_id": "6f1138880c50b20f65051e87fef1bdd046f3cc75", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/cby_1__1_.v" }, { "type": "modify", "old_id": "bedf10d121030d2e4750facefcb89e996c84ccb1", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/cby_2__1_.v", "new_id": "2f9eccdc5a20aa51a3bffe17ad7dacfaf2f334ee", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/cby_2__1_.v" }, { "type": "modify", "old_id": "dec857fc3dbd97b703ba2ca985e50c421d27a1ba", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/sb_0__0_.v", "new_id": "3dd78c055cdda2ca2222c185c764723f55ef9591", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/sb_0__0_.v" }, { "type": "modify", "old_id": "d7405b1e1201ccaa13cd2408295956ad0cd843f3", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/sb_0__1_.v", "new_id": "805c3fa6f2847445c70ed47403236b43449b1661", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/sb_0__1_.v" }, { "type": "modify", "old_id": "a195adc5166e2a4e91b4f32e04385c2731d8511b", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/sb_0__2_.v", "new_id": "c3e44b77bf82fa0f204f31c7e55889e627bd87e4", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/sb_0__2_.v" }, { "type": "modify", "old_id": "e5fd0e74d9db6c114612975f71111164d89c47b6", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/sb_1__0_.v", "new_id": "a2ae27777357e2ea1e1841c50f3b489c3b22f3f5", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/sb_1__0_.v" }, { "type": "modify", "old_id": "e527b7a50fb9b5235c192d96875a1dd47723b57d", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/sb_1__1_.v", "new_id": "8bc11802f368a2d0c6dddebd9f137ca58b2dd1f7", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/sb_1__1_.v" }, { "type": "modify", "old_id": "8109659ab4d519b6b7f99627c418e4fb5881322b", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/sb_1__2_.v", "new_id": "3aeb00c04afd14d6359a1ef245c207a45484ee27", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/sb_1__2_.v" }, { "type": "modify", "old_id": "1acb214d59703d7198021984b6db487e48cea039", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/sb_2__0_.v", "new_id": "31d38a3c27987f51f93384cd4483108a6a929633", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/sb_2__0_.v" }, { "type": "modify", "old_id": "f11e03562f22b19ef5034286790ac5e9b15c4c1f", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/sb_2__1_.v", "new_id": "dccb30f4aa2a3bbc1e7340c5617cb948f1dbe9f6", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/sb_2__1_.v" }, { "type": "modify", "old_id": "0be7e526f9141b4efcb4170538f7af912038c7f3", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/routing/sb_2__2_.v", "new_id": "f35fdeafa50ccd829cef4e32f3ad3d8adaa6b272", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/routing/sb_2__2_.v" }, { "type": "modify", "old_id": "0f7598204a96f78064fbe49515640cf5f5c248ef", "old_mode": 33188, "old_path": "verilog/rtl/user_project/SRC/sub_module/user_project_wrapper.v", "new_id": "05a3137c6e93146b8f9f290de18ff95db78ae955", "new_mode": 33188, "new_path": "verilog/rtl/user_project/SRC/sub_module/user_project_wrapper.v" }, { "type": "modify", "old_id": "0f7598204a96f78064fbe49515640cf5f5c248ef", "old_mode": 33188, "old_path": "verilog/rtl/user_project_wrapper.v", "new_id": "05a3137c6e93146b8f9f290de18ff95db78ae955", "new_mode": 33188, "new_path": "verilog/rtl/user_project_wrapper.v" } ] }