RULE,Waivable,rule_letter,category,COUNT 1, COUNT 2
k_2_met1OverCA,no,k,stress,1033,53813
k_5_met2OverCA,no,k,stress,603,15454
k_8_met3OverCA,no,k,stress,505,3599
k_10_met4slot,no,k,stress,6,63
k_11_met4OverCA,no,k,stress,501,4265
k_14_met5OverCA,no,k,stress,197,2277
r_17_stress.9,no,r,stress,2,2
r_24_stress.10,no,r,stress,192,192
r_26_stress.10,no,r,stress,93,93
r_57_slot.14_w,no,r,stress,6,63
r_74_slot.11,no,r,stress,63,63
r_91_slot.9/16,no,r,stress,6,63
r_98_anchor.1,no,r,stress,20,20
r_4_soft_majority_substrate,no,r,soft,1000,63820
r_5_soft_multinet_Poly_check,no,r,soft,8,135
r_2_lu1.2.1a,no,r,latchup,462,462
r_14_lu1.3.1a,no,r,latchup,390,390
k_1_ptap_SGR,no,k,latchup,29,594
k_2_hole_ptap_SGR,no,k,latchup,86,904
k_3_ntap_SGR,no,k,latchup,22,515
k_4_hole_ntap_SGR,no,k,latchup,36,701
k_5_inner_ptap_DGR,no,k,latchup,20,538
k_6_inner_hole_ptap_DGR,no,k,latchup,66,790
k_7_PinnerToSecondReg_DGR,no,k,latchup,46,1512
k_8_second_ntap_DGR,no,k,latchup,11,164
k_9_inner_ntap_DGR,no,k,latchup,11,324
k_10_inner_hole_ntap_DGR,no,k,latchup,13,412
k_11_NinnerToSecondReg_DGR,no,k,latchup,36,1512
k_12_second_ptap_DGR,no,k,latchup,4,57
r_113_lu.11.3,no,r,latchup,1,63
k_29_LU5_ioNSDOrNwellSz,no,k,latchup,161,2150
r_156_lu.4.3.1,no,r,latchup,2,45
r_164_lu.4.2.1,no,r,latchup,4,47
r_167_lu.4.2.1,no,r,latchup,2,45
r_168_lu.4.2.1,no,r,latchup,3,89
k_42_ioNsrcDrnShrtRes,no,k,latchup,155,5153
k_43_ioPsrcDrnShrtRes,no,k,latchup,155,5153
k_45_poly_resNoEsd,no,k,latchup,49,953
r_246_ar.met1.1,no,r,latchup,90,90
r_248_ar.met2.1,no,r,latchup,92,92
r_250_ar.met3.1,no,r,latchup,382,382
r_251_ar.via3.1,no,r,latchup,88,88
r_252_ar.met4.1,no,r,latchup,26,26
r_498_nwell.10,no,r,drc,166,11835
s_72_chipint.1,no,s,drc,6,6
LI1M,no,L,fill,4,4
MM1,no,M,fill,14356,16184
MM2,no,M,fill,16401,20513
MM3,no,M,fill,1987,1987
MM4,no,M,fill,718,718
MM5,no,M,fill,799,799