diff --git a/openlane/user_proj_aes/config.tcl b/openlane/user_proj_aes/config.tcl
index be611d3..15a9ebb 100644
--- a/openlane/user_proj_aes/config.tcl
+++ b/openlane/user_proj_aes/config.tcl
@@ -4,11 +4,11 @@
 
 set ::env(VERILOG_FILES) "\
 	$script_dir/../../verilog/rtl/defines.v \
-	$script_dir/../../verilog/rtl/user_proj_aes/aes_sbox.v \
-	$script_dir/../../verilog/rtl/user_proj_aes/aes_rcon.v \
 	$script_dir/../../verilog/rtl/user_proj_aes/aes_core.v \
-	$script_dir/../../verilog/rtl/user_proj_aes/aes_cipher_top.v \
-	$script_dir/../../verilog/rtl/user_proj_aes/aes_key_expand_128.v"
+	$script_dir/../../third_party/aes_128/aes_sbox.v \
+	$script_dir/../../third_party/aes_128/aes_rcon.v \
+	$script_dir/../../third_party/aes_128/aes_cipher_top.v \
+	$script_dir/../../third_party/aes_128/aes_key_expand_128.v"
 
 set ::env(CLOCK_PORT) "wb_clk_i"
 set ::env(CLOCK_PERIOD) "10"
diff --git a/third_party/aes_128/LICENSE b/third_party/aes_128/LICENSE
new file mode 100644
index 0000000..52ecd02
--- /dev/null
+++ b/third_party/aes_128/LICENSE
@@ -0,0 +1,29 @@
+Copyright (C) 2000-2017, ASICs World Services, LTD.
+
+All rights reserved.
+
+Redistribution and use in source, netlist, binary and silicon forms, with
+or without modification, are permitted provided that the following conditions
+are met:
+
+   * Redistributions of source code must retain the above copyright notice,
+     this list of conditions and the following disclaimer.
+     
+   * Redistributions in binary form must reproduce the above copyright notice,
+     this list of conditions and the following disclaimer in the documentation
+     and/or other materials provided with the distribution.
+     
+   * Neither the name of ASICS World Services, the Authors and/or the names of
+     its contributors may be used to endorse or promote products derived from
+     this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/verilog/rtl/user_proj_aes/aes_cipher_top.v b/third_party/aes_128/aes_cipher_top.v
similarity index 100%
rename from verilog/rtl/user_proj_aes/aes_cipher_top.v
rename to third_party/aes_128/aes_cipher_top.v
diff --git a/verilog/rtl/user_proj_aes/aes_inv_cipher_top.v b/third_party/aes_128/aes_inv_cipher_top.v
similarity index 100%
rename from verilog/rtl/user_proj_aes/aes_inv_cipher_top.v
rename to third_party/aes_128/aes_inv_cipher_top.v
diff --git a/verilog/rtl/user_proj_aes/aes_inv_sbox.v b/third_party/aes_128/aes_inv_sbox.v
similarity index 100%
rename from verilog/rtl/user_proj_aes/aes_inv_sbox.v
rename to third_party/aes_128/aes_inv_sbox.v
diff --git a/verilog/rtl/user_proj_aes/aes_key_expand_128.v b/third_party/aes_128/aes_key_expand_128.v
similarity index 100%
rename from verilog/rtl/user_proj_aes/aes_key_expand_128.v
rename to third_party/aes_128/aes_key_expand_128.v
diff --git a/verilog/rtl/user_proj_aes/aes_rcon.v b/third_party/aes_128/aes_rcon.v
similarity index 100%
rename from verilog/rtl/user_proj_aes/aes_rcon.v
rename to third_party/aes_128/aes_rcon.v
diff --git a/verilog/rtl/user_proj_aes/aes_sbox.v b/third_party/aes_128/aes_sbox.v
similarity index 100%
rename from verilog/rtl/user_proj_aes/aes_sbox.v
rename to third_party/aes_128/aes_sbox.v