timestamp 1606262209
version 8.3
tech sky130A
style ngspice()
scale 1000 1 500000
resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
abstract
port "VCCHIB" 8 14746 427 15000 1477 m5
port "VCCHIB" 8 14746 427 15000 1477 m5
port "VCCD" 7 14746 1797 15000 2687 m5
port "VCCD" 7 14746 1797 15000 2687 m5
port "VCCHIB" 8 0 427 254 1477 m5
port "VCCHIB" 8 0 427 254 1477 m5
port "VCCD" 7 0 1797 254 2687 m5
port "VCCD" 7 0 1797 254 2687 m5
port "VDDA" 9 14807 3007 15000 3657 m5
port "VDDA" 9 14807 3007 15000 3657 m5
port "VDDA" 9 0 3007 193 3657 m5
port "VDDA" 9 0 3007 193 3657 m5
port "VDDIO" 10 14746 3977 15000 4867 m5
port "VSSIO" 14 14746 5187 15000 6077 m5
port "VSSIO" 14 14746 5187 15000 6077 m5
port "VSWITCH" 16 14746 6397 15000 7047 m5
port "VSWITCH" 16 14746 6397 15000 7047 m5
port "VSSA" 12 14746 7368 15000 8017 m5
port "VSSA" 12 14746 7368 15000 8017 m5
port "VSSD" 13 14746 8337 15000 9227 m5
port "VSSD" 13 14746 8337 15000 9227 m5
port "VSSA" 12 14746 9547 15000 11347 m5
port "VSSA" 12 14746 9547 15000 11347 m5
port "VSSIO_Q" 15 14746 11667 15000 12517 m5
port "VSSIO_Q" 15 14746 11667 15000 12517 m5
port "VDDIO_Q" 11 14746 12837 15000 13687 m5
port "VDDIO_Q" 11 14746 12837 15000 13687 m5
port "VDDIO" 10 14746 14007 15000 18997 m5
port "VDDIO" 10 0 3977 254 4867 m5
port "VSSIO" 14 0 5187 254 6077 m5
port "VSSIO" 14 0 5187 254 6077 m5
port "VSWITCH" 16 0 6397 254 7047 m5
port "VSWITCH" 16 0 6397 254 7047 m5
port "VSSA" 12 0 7368 254 8017 m5
port "VSSA" 12 0 7368 254 8017 m5
port "VSSD" 13 0 8337 254 9227 m5
port "VSSD" 13 0 8337 254 9227 m5
port "VSSA" 12 0 9547 254 11347 m5
port "VSSA" 12 0 9547 254 11347 m5
port "VSSIO_Q" 15 0 11667 254 12517 m5
port "VSSIO_Q" 15 0 11667 254 12517 m5
port "VDDIO_Q" 11 0 12837 254 13687 m5
port "VDDIO_Q" 11 0 12837 254 13687 m5
port "VDDIO" 10 0 14007 254 18997 m5
port "PAD" 22 3450 21691 10887 32857 m5
port "VSSIO" 14 14746 35157 15000 40000 m5
port "VSSIO" 14 14746 35157 15000 40000 m5
port "VSSIO" 14 0 35157 254 40000 m5
port "VSSIO" 14 0 35157 254 40000 m5
port "VCCHIB" 8 14746 407 15000 1497 m4
port "VCCHIB" 8 14746 407 15000 1497 m4
port "VCCHIB" 8 0 407 254 1497 m4
port "VCCD" 7 14746 1777 15000 2707 m4
port "VCCD" 7 14746 1777 15000 2707 m4
port "VCCD" 7 0 1777 254 2707 m4
port "VDDA" 9 14807 2987 15000 3677 m4
port "VDDA" 9 14807 2987 15000 3677 m4
port "VDDA" 9 0 2987 193 3677 m4
port "VDDIO" 10 14746 3957 15000 4887 m4
port "VDDIO" 10 0 3957 254 4887 m4
port "VSSIO" 14 14746 5167 15000 6097 m4
port "VSSIO" 14 14746 5167 15000 6097 m4
port "VSSIO" 14 0 5167 254 6097 m4
port "VSSIO" 14 0 5167 254 6097 m4
port "VSWITCH" 16 14746 6377 15000 7067 m4
port "VSWITCH" 16 14746 6377 15000 7067 m4
port "VSWITCH" 16 0 6377 254 7067 m4
port "VSSA" 12 14746 7347 15000 8037 m4
port "VSSA" 12 14746 7347 15000 8037 m4
port "VSSA" 12 0 7347 254 8037 m4
port "VSSD" 13 14731 8326 15000 9238 m4
port "VSSD" 13 14746 8317 15000 8326 m4
port "VSSD" 13 14746 9238 15000 9247 m4
port "VSSD" 13 14746 8317 15000 9247 m4
port "VSSD" 13 0 8317 254 9247 m4
port "VSSA" 12 14746 9547 15000 9613 m4
port "VSSA" 12 0 9547 254 9613 m4
port "VSSA" 12 0 9547 254 9613 m4
port "VSSA" 12 0 9547 15000 9613 m4
port "AMUXBUS_B" 21 14746 9673 15000 10269 m4
port "AMUXBUS_B" 21 0 9673 254 10269 m4
port "AMUXBUS_B" 21 0 9673 15000 10269 m4
port "VSSA" 12 14746 10329 15000 10565 m4
port "VSSA" 12 14746 10329 15000 10565 m4
port "VSSA" 12 0 10329 254 10565 m4
port "VSSA" 12 0 10329 254 10565 m4
port "AMUXBUS_A" 20 14746 10625 15000 11221 m4
port "AMUXBUS_A" 20 0 10625 254 11221 m4
port "AMUXBUS_A" 20 0 10625 15000 11221 m4
port "VSSA" 12 14746 11281 15000 11347 m4
port "VSSA" 12 0 11281 254 11347 m4
port "VSSA" 12 0 11281 254 11347 m4
port "VSSA" 12 0 11281 15000 11347 m4
port "VSSIO_Q" 15 14746 11647 15000 12537 m4
port "VSSIO_Q" 15 14746 11647 15000 12537 m4
port "VSSIO_Q" 15 0 11647 254 12537 m4
port "VDDIO_Q" 11 14746 12817 15000 13707 m4
port "VDDIO_Q" 11 14746 12817 15000 13707 m4
port "VDDIO_Q" 11 0 12817 254 13707 m4
port "VDDIO" 10 14746 14007 15000 19000 m4
port "VDDIO" 10 0 14007 254 19000 m4
port "VSSIO" 14 14746 35157 15000 40000 m4
port "VSSIO" 14 14746 35157 15000 40000 m4
port "VSSIO" 14 0 35157 254 40000 m4
port "PAD_A_ESD_H" 23 3449 0 3782 627 m3
port "PAD_A_ESD_H" 23 3449 0 3782 113 m3
port "FILT_IN_H" 5 4015 0 4245 1334 m3
port "FILT_IN_H" 5 4015 682 4245 1364 m3
port "FILT_IN_H" 5 4015 1364 4275 1394 m3
port "FILT_IN_H" 5 4015 1394 4305 1424 m3
port "FILT_IN_H" 5 4015 1424 4335 1430 m3
port "FILT_IN_H" 5 4045 1430 4341 1460 m3
port "FILT_IN_H" 5 4075 1460 4371 1490 m3
port "FILT_IN_H" 5 4105 1490 4401 1520 m3
port "FILT_IN_H" 5 4135 1520 4431 1550 m3
port "FILT_IN_H" 5 4165 1550 4461 1580 m3
port "FILT_IN_H" 5 4015 1430 4212 1627 m3
port "FILT_IN_H" 5 4245 1334 4538 1627 m3
port "FILT_IN_H" 5 4212 1627 4268 1683 m3
port "FILT_IN_H" 5 4015 0 4245 282 m3
port "XRES_H_N" 19 5634 2122 5810 2152 m3
port "XRES_H_N" 19 5634 2122 5780 2182 m3
port "XRES_H_N" 19 5634 2182 5780 2954 m3
port "XRES_H_N" 19 5637 2119 5840 2122 m3
port "XRES_H_N" 19 5667 2089 5843 2119 m3
port "XRES_H_N" 19 5634 2029 5727 2122 m3
port "XRES_H_N" 19 5780 2029 5933 2182 m3
port "XRES_H_N" 19 5727 1969 5787 2029 m3
port "XRES_H_N" 19 5787 0 5933 1969 m3
port "XRES_H_N" 19 5787 801 5933 2029 m3
port "XRES_H_N" 19 5787 0 5933 66 m3
port "FILT_IN_H" 5 4538 1627 4594 1683 m3
port "FILT_IN_H" 5 4315 1700 4611 1730 m3
port "FILT_IN_H" 5 4345 1730 4641 1760 m3
port "FILT_IN_H" 5 4375 1760 4671 1790 m3
port "FILT_IN_H" 5 4405 1790 4701 1820 m3
port "FILT_IN_H" 5 4435 1820 4731 1850 m3
port "FILT_IN_H" 5 4465 1850 4761 1880 m3
port "FILT_IN_H" 5 4594 1683 4810 1899 m3
port "FILT_IN_H" 5 4514 1899 4810 1929 m3
port "FILT_IN_H" 5 4544 1929 4810 1959 m3
port "FILT_IN_H" 5 4268 1683 4581 1996 m3
port "FILT_IN_H" 5 4581 1899 4810 1996 m3
port "FILT_IN_H" 5 4581 1996 4810 2453 m3
port "ENABLE_VDDIO" 4 1578 3259 1694 3289 m3
port "ENABLE_VDDIO" 4 1548 3199 1638 3289 m3
port "ENABLE_VDDIO" 4 1666 3199 1784 3317 m3
port "ENABLE_VDDIO" 4 1638 3157 1680 3199 m3
port "ENABLE_VDDIO" 4 1680 0 1784 3157 m3
port "ENABLE_VDDIO" 4 1680 227 1784 3199 m3
port "ENABLE_VDDIO" 4 1680 0 1784 66 m3
port "ENABLE_VDDIO" 4 1355 3482 1480 3503 m3
port "ENABLE_VDDIO" 4 1355 3503 1459 3524 m3
port "ENABLE_VDDIO" 4 1355 3524 1459 6259 m3
port "ENABLE_VDDIO" 4 1355 3482 1459 6280 m3
port "ENABLE_VDDIO" 4 1355 6280 1480 6301 m3
port "ENABLE_VDDIO" 4 1368 3469 1501 3482 m3
port "ENABLE_VDDIO" 4 1385 6301 1501 6331 m3
port "ENABLE_VDDIO" 4 1459 3409 1574 3524 m3
port "ENABLE_VDDIO" 4 1355 6301 1430 6376 m3
port "ENABLE_VDDIO" 4 1355 3379 1458 3482 m3
port "ENABLE_VDDIO" 4 1459 6259 1576 6376 m3
port "ENABLE_VDDIO" 4 1458 3379 1574 3409 m3
port "ENABLE_VDDIO" 4 1475 6391 1591 6421 m3
port "ENABLE_VDDIO" 4 1488 3349 1604 3379 m3
port "ENABLE_VDDIO" 4 1505 6421 1621 6451 m3
port "ENABLE_VDDIO" 4 1458 3289 1548 3379 m3
port "ENABLE_VDDIO" 4 1535 6451 1651 6481 m3
port "ENABLE_VDDIO" 4 1574 3317 1666 3409 m3
port "ENABLE_VDDIO" 4 1430 6376 1573 6519 m3
port "ENABLE_VDDIO" 4 1576 6376 1719 6519 m3
port "ENABLE_VDDIO" 4 1625 6541 1741 6571 m3
port "ENABLE_VDDIO" 4 1655 6571 1771 6601 m3
port "ENABLE_VDDIO" 4 1573 6519 1690 6636 m3
port "ENABLE_VDDIO" 4 1719 6519 1836 6636 m3
port "ENABLE_VDDIO" 4 1836 6636 1879 6679 m3
port "ENABLE_VDDIO" 4 1763 6679 4455 6709 m3
port "ENABLE_VDDIO" 4 1690 6636 1794 6740 m3
port "ENABLE_VDDIO" 4 1823 6739 4455 6769 m3
port "ENABLE_VDDIO" 4 1794 6740 1879 6825 m3
port "ENABLE_VDDIO" 4 1879 6799 4455 6825 m3
port "TIE_WEAK_HI_H" 25 12972 14386 13262 14416 m3
port "TIE_WEAK_HI_H" 25 12972 14416 13232 14446 m3
port "TIE_WEAK_HI_H" 25 13198 14442 13236 14480 m3
port "TIE_WEAK_HI_H" 25 12972 14386 13198 14480 m3
port "TIE_WEAK_HI_H" 25 12972 14480 13198 18929 m3
port "TIE_WEAK_HI_H" 25 12998 14360 13292 14386 m3
port "TIE_WEAK_HI_H" 25 13028 14330 13318 14360 m3
port "TIE_WEAK_HI_H" 25 13058 14300 13348 14330 m3
port "TIE_WEAK_HI_H" 25 13088 14270 13378 14300 m3
port "TIE_WEAK_HI_H" 25 13118 14240 13408 14270 m3
port "TIE_WEAK_HI_H" 25 13236 14200 13478 14442 m3
port "TIE_WEAK_HI_H" 25 12972 14150 13208 14386 m3
port "TIE_WEAK_HI_H" 25 13208 14150 13498 14180 m3
port "TIE_WEAK_HI_H" 25 13238 14120 13528 14150 m3
port "TIE_WEAK_HI_H" 25 13268 14090 13558 14120 m3
port "TIE_WEAK_HI_H" 25 13298 14060 13588 14090 m3
port "TIE_WEAK_HI_H" 25 13328 14030 13618 14060 m3
port "TIE_WEAK_HI_H" 25 13478 14007 13671 14200 m3
port "TIE_WEAK_HI_H" 25 13388 13970 13678 14000 m3
port "TIE_WEAK_HI_H" 25 13418 13940 13708 13970 m3
port "TIE_WEAK_HI_H" 25 13208 13880 13478 14150 m3
port "TIE_WEAK_HI_H" 25 13478 13880 13768 13910 m3
port "TIE_WEAK_HI_H" 25 13508 13850 13798 13880 m3
port "TIE_WEAK_HI_H" 25 13538 13820 13828 13850 m3
port "TIE_WEAK_HI_H" 25 13671 13817 13861 14007 m3
port "TIE_WEAK_HI_H" 25 13598 13760 13888 13790 m3
port "TIE_WEAK_HI_H" 25 13478 13707 13651 13880 m3
port "TIE_WEAK_HI_H" 25 13658 13700 13948 13730 m3
port "TIE_WEAK_HI_H" 25 13688 13670 13978 13700 m3
port "TIE_WEAK_HI_H" 25 13718 13640 14008 13670 m3
port "TIE_WEAK_HI_H" 25 13748 13610 14038 13640 m3
port "TIE_WEAK_HI_H" 25 13861 13560 14118 13817 m3
port "TIE_WEAK_HI_H" 25 13651 13520 13838 13707 m3
port "TIE_WEAK_HI_H" 25 13838 13520 14128 13550 m3
port "TIE_WEAK_HI_H" 25 13868 13490 14158 13520 m3
port "TIE_WEAK_HI_H" 25 13898 13460 14188 13490 m3
port "TIE_WEAK_HI_H" 25 13928 13430 14218 13460 m3
port "TIE_WEAK_HI_H" 25 13958 13400 14248 13430 m3
port "TIE_WEAK_HI_H" 25 13988 13370 14278 13400 m3
port "TIE_WEAK_HI_H" 25 14018 13340 14308 13370 m3
port "TIE_WEAK_HI_H" 25 14048 13310 14338 13340 m3
port "TIE_WEAK_HI_H" 25 14078 13280 14368 13310 m3
port "TIE_WEAK_HI_H" 25 13838 13240 14118 13520 m3
port "TIE_WEAK_HI_H" 25 14118 13240 14438 13560 m3
port "TIE_WEAK_HI_H" 25 14168 13190 14458 13220 m3
port "TIE_WEAK_HI_H" 25 14198 13160 14488 13190 m3
port "TIE_WEAK_HI_H" 25 14228 13130 14518 13160 m3
port "TIE_WEAK_HI_H" 25 14258 13100 14548 13130 m3
port "TIE_WEAK_HI_H" 25 14288 13070 14578 13100 m3
port "TIE_WEAK_HI_H" 25 14318 13040 14608 13070 m3
port "TIE_WEAK_HI_H" 25 14348 13010 14638 13040 m3
port "TIE_WEAK_HI_H" 25 14378 12980 14668 13010 m3
port "TIE_WEAK_HI_H" 25 14118 12920 14438 13240 m3
port "TIE_WEAK_HI_H" 25 14438 0 14652 9864 m3
port "TIE_WEAK_HI_H" 25 14438 145 14652 9894 m3
port "TIE_WEAK_HI_H" 25 14438 9894 14682 9924 m3
port "TIE_WEAK_HI_H" 25 14438 9924 14712 9954 m3
port "TIE_WEAK_HI_H" 25 14438 9954 14742 9984 m3
port "TIE_WEAK_HI_H" 25 14652 9864 14785 9997 m3
port "TIE_WEAK_HI_H" 25 14438 9997 14785 12893 m3
port "TIE_WEAK_HI_H" 25 14438 12893 14772 12906 m3
port "TIE_WEAK_HI_H" 25 14438 12906 14759 12919 m3
port "TIE_WEAK_HI_H" 25 14438 12919 14758 12920 m3
port "TIE_WEAK_HI_H" 25 14438 12893 14785 13240 m3
port "TIE_WEAK_HI_H" 25 14438 0 14652 66 m3
port "TIE_WEAK_HI_H" 25 14443 0 14647 66 m2
port "DISABLE_PULLUP_H" 1 6552 0 6604 128 m2
port "DISABLE_PULLUP_H" 1 6552 0 6604 66 m2
port "TIE_HI_ESD" 17 6101 0 6231 66 m2
port "TIE_HI_ESD" 17 6101 0 6231 66 m2
port "XRES_H_N" 19 5787 0 5933 66 m2
port "TIE_LO_ESD" 18 5516 0 5646 66 m2
port "TIE_LO_ESD" 18 5516 0 5646 66 m2
port "FILT_IN_H" 5 4015 0 4245 282 m2
port "PAD_A_ESD_H" 23 3449 0 3782 113 m2
port "PULLUP_H" 24 2911 0 3027 197 m2
port "PULLUP_H" 24 2911 0 3027 66 m2
port "ENABLE_H" 3 2457 0 2509 294 m2
port "ENABLE_H" 3 2457 0 2509 66 m2
port "ENABLE_VDDIO" 4 1685 0 1779 66 m2
port "EN_VDDIO_SIG_H" 2 2084 767 2144 781 m2
port "EN_VDDIO_SIG_H" 2 2098 753 2158 767 m2
port "EN_VDDIO_SIG_H" 2 2139 739 2186 786 m2
port "EN_VDDIO_SIG_H" 2 2070 715 2136 781 m2
port "EN_VDDIO_SIG_H" 2 2136 715 3005 729 m2
port "EN_VDDIO_SIG_H" 2 2136 687 2164 715 m2
port "EN_VDDIO_SIG_H" 2 2164 687 2977 739 m2
port "EN_VDDIO_SIG_H" 2 2955 739 2975 759 m2
port "EN_VDDIO_SIG_H" 2 2977 687 3049 759 m2
port "EN_VDDIO_SIG_H" 2 2997 767 3057 781 m2
port "EN_VDDIO_SIG_H" 2 3011 781 3071 795 m2
port "EN_VDDIO_SIG_H" 2 2975 759 3029 813 m2
port "EN_VDDIO_SIG_H" 2 3049 759 3103 813 m2
port "EN_VDDIO_SIG_H" 2 3053 823 3113 837 m2
port "EN_VDDIO_SIG_H" 2 3067 837 3127 851 m2
port "EN_VDDIO_SIG_H" 2 3081 851 3141 865 m2
port "EN_VDDIO_SIG_H" 2 3029 813 3103 887 m2
port "EN_VDDIO_SIG_H" 2 3103 813 3177 887 m2
port "EN_VDDIO_SIG_H" 2 3123 893 3183 907 m2
port "EN_VDDIO_SIG_H" 2 3177 887 3199 909 m2
port "EN_VDDIO_SIG_H" 2 3139 909 5753 923 m2
port "EN_VDDIO_SIG_H" 2 3153 923 5767 937 m2
port "EN_VDDIO_SIG_H" 2 3103 887 3177 961 m2
port "EN_VDDIO_SIG_H" 2 3177 951 5795 961 m2
port "EN_VDDIO_SIG_H" 2 4413 908 4588 909 m2
port "EN_VDDIO_SIG_H" 2 4427 894 4574 908 m2
port "EN_VDDIO_SIG_H" 2 4441 880 4560 894 m2
port "EN_VDDIO_SIG_H" 2 4532 852 4589 909 m2
port "EN_VDDIO_SIG_H" 2 4469 852 4532 866 m2
port "EN_VDDIO_SIG_H" 2 4470 851 4532 852 m2
port "EN_VDDIO_SIG_H" 2 4412 849 4472 909 m2
port "EN_VDDIO_SIG_H" 2 4472 0 4532 849 m2
port "EN_VDDIO_SIG_H" 2 4472 234 4532 961 m2
port "EN_VDDIO_SIG_H" 2 5731 961 5750 980 m2
port "EN_VDDIO_SIG_H" 2 5753 909 5824 980 m2
port "EN_VDDIO_SIG_H" 2 5773 989 5833 1003 m2
port "EN_VDDIO_SIG_H" 2 5787 1003 5847 1017 m2
port "EN_VDDIO_SIG_H" 2 5801 1017 5861 1031 m2
port "EN_VDDIO_SIG_H" 2 5750 980 5816 1046 m2
port "EN_VDDIO_SIG_H" 2 5824 980 5890 1046 m2
port "EN_VDDIO_SIG_H" 2 5890 1046 5916 1072 m2
port "EN_VDDIO_SIG_H" 2 5816 1046 5864 1094 m2
port "EN_VDDIO_SIG_H" 2 5864 1083 5916 1094 m2
port "EN_VDDIO_SIG_H" 2 5864 1094 5916 2195 m2
port "EN_VDDIO_SIG_H" 2 5864 1072 5916 2206 m2
port "EN_VDDIO_SIG_H" 2 5864 2206 5927 2217 m2
port "EN_VDDIO_SIG_H" 2 5864 2217 5880 2233 m2
port "EN_VDDIO_SIG_H" 2 5916 2195 5954 2233 m2
port "EN_VDDIO_SIG_H" 2 5906 2245 5966 2259 m2
port "EN_VDDIO_SIG_H" 2 5920 2259 5980 2273 m2
port "EN_VDDIO_SIG_H" 2 5954 2233 6006 2285 m2
port "EN_VDDIO_SIG_H" 2 5880 2233 5954 2307 m2
port "EN_VDDIO_SIG_H" 2 5954 2296 6006 2307 m2
port "EN_VDDIO_SIG_H" 2 5954 2307 6006 3129 m2
port "EN_VDDIO_SIG_H" 2 5954 2285 6006 3140 m2
port "EN_VDDIO_SIG_H" 2 5954 3140 6017 3151 m2
port "EN_VDDIO_SIG_H" 2 5968 3151 6028 3165 m2
port "EN_VDDIO_SIG_H" 2 5982 3165 6042 3179 m2
port "EN_VDDIO_SIG_H" 2 5954 3151 5999 3196 m2
port "EN_VDDIO_SIG_H" 2 6006 3129 6073 3196 m2
port "EN_VDDIO_SIG_H" 2 6024 3207 6084 3221 m2
port "EN_VDDIO_SIG_H" 2 6038 3221 6098 3235 m2
port "EN_VDDIO_SIG_H" 2 6073 3196 6125 3248 m2
port "EN_VDDIO_SIG_H" 2 5999 3196 6073 3270 m2
port "EN_VDDIO_SIG_H" 2 6073 3248 6125 3270 m2
port "EN_VDDIO_SIG_H" 2 6073 3270 6125 4099 m2
port "EN_VDDIO_SIG_H" 2 4472 0 4532 66 m2
port "EN_VDDIO_SIG_H" 2 1947 904 2010 915 m2
port "EN_VDDIO_SIG_H" 2 1947 915 1999 926 m2
port "EN_VDDIO_SIG_H" 2 1947 926 1999 1772 m2
port "EN_VDDIO_SIG_H" 2 1947 904 1999 1783 m2
port "EN_VDDIO_SIG_H" 2 1947 1783 2010 1794 m2
port "EN_VDDIO_SIG_H" 2 1958 893 2021 904 m2
port "EN_VDDIO_SIG_H" 2 1961 1794 2021 1808 m2
port "EN_VDDIO_SIG_H" 2 1972 879 2032 893 m2
port "EN_VDDIO_SIG_H" 2 1975 1808 2035 1822 m2
port "EN_VDDIO_SIG_H" 2 1986 865 2046 879 m2
port "EN_VDDIO_SIG_H" 2 1947 1794 1993 1840 m2
port "EN_VDDIO_SIG_H" 2 1947 850 2001 904 m2
port "EN_VDDIO_SIG_H" 2 1999 1772 2067 1840 m2
port "EN_VDDIO_SIG_H" 2 2009 850 2075 916 m2
port "EN_VDDIO_SIG_H" 2 2017 1850 2077 1864 m2
port "EN_VDDIO_SIG_H" 2 2028 823 2088 837 m2
port "EN_VDDIO_SIG_H" 2 1993 1840 2033 1880 m2
port "EN_VDDIO_SIG_H" 2 2042 809 2102 823 m2
port "EN_VDDIO_SIG_H" 2 2067 1840 2107 1880 m2
port "EN_VDDIO_SIG_H" 2 2001 781 2070 850 m2
port "EN_VDDIO_SIG_H" 2 2059 1892 2119 1906 m2
port "EN_VDDIO_SIG_H" 2 2075 786 2139 850 m2
port "EN_VDDIO_SIG_H" 2 2073 1906 2133 1920 m2
port "EN_VDDIO_SIG_H" 2 2033 1880 2099 1946 m2
port "EN_VDDIO_SIG_H" 2 2107 1880 2173 1946 m2
port "EN_VDDIO_SIG_H" 2 2115 1948 2175 1962 m2
port "EN_VDDIO_SIG_H" 2 2129 1962 2189 1976 m2
port "EN_VDDIO_SIG_H" 2 2130 5365 2225 5417 m2
port "EN_VDDIO_SIG_H" 2 2130 5417 2211 5431 m2
port "EN_VDDIO_SIG_H" 2 2130 5431 2197 5445 m2
port "EN_VDDIO_SIG_H" 2 2182 5417 2225 5460 m2
port "EN_VDDIO_SIG_H" 2 2130 5459 2182 5460 m2
port "EN_VDDIO_SIG_H" 2 2130 5460 2182 5587 m2
port "EN_VDDIO_SIG_H" 2 2130 5417 2182 5601 m2
port "EN_VDDIO_SIG_H" 2 2130 5601 2196 5615 m2
port "EN_VDDIO_SIG_H" 2 2130 5615 2210 5629 m2
port "EN_VDDIO_SIG_H" 2 2182 5587 2225 5630 m2
port "EN_VDDIO_SIG_H" 2 2130 5630 2225 5682 m2
port "EN_VDDIO_SIG_H" 2 2131 5364 2225 5365 m2
port "EN_VDDIO_SIG_H" 2 2143 1976 2203 1990 m2
port "EN_VDDIO_SIG_H" 2 2144 5682 2225 5696 m2
port "EN_VDDIO_SIG_H" 2 2145 5350 2225 5364 m2
port "EN_VDDIO_SIG_H" 2 2173 1946 2225 1998 m2
port "EN_VDDIO_SIG_H" 2 2158 5696 2225 5710 m2
port "EN_VDDIO_SIG_H" 2 2130 5322 2173 5365 m2
port "EN_VDDIO_SIG_H" 2 2099 1946 2173 2020 m2
port "EN_VDDIO_SIG_H" 2 2130 5682 2173 5725 m2
port "EN_VDDIO_SIG_H" 2 2173 2009 2225 2020 m2
port "EN_VDDIO_SIG_H" 2 2173 2020 2225 5322 m2
port "EN_VDDIO_SIG_H" 2 2173 1998 2225 5417 m2
port "EN_VDDIO_SIG_H" 2 2173 5724 2225 5725 m2
port "EN_VDDIO_SIG_H" 2 2173 5725 2225 6217 m2
port "EN_VDDIO_SIG_H" 2 2173 5630 2225 6228 m2
port "EN_VDDIO_SIG_H" 2 2173 6228 2236 6239 m2
port "EN_VDDIO_SIG_H" 2 2225 6217 2254 6246 m2
port "EN_VDDIO_SIG_H" 2 2201 6253 2261 6267 m2
port "EN_VDDIO_SIG_H" 2 2173 6239 2225 6291 m2
port "EN_VDDIO_SIG_H" 2 2254 6246 2299 6291 m2
port "EN_VDDIO_SIG_H" 2 2299 6291 2304 6296 m2
port "EN_VDDIO_SIG_H" 2 2225 6291 2252 6318 m2
port "EN_VDDIO_SIG_H" 2 2252 6307 2304 6318 m2
port "EN_VDDIO_SIG_H" 2 2252 6296 2304 7204 m2
port "EN_VDDIO_SIG_H" 2 2252 7204 2430 7256 m2
port "DISABLE_PULLUP_H" 1 6552 0 6604 66 m1
port "TIE_HI_ESD" 17 6101 0 6231 66 m1
port "TIE_LO_ESD" 18 5516 0 5646 66 m1
port "INP_SEL_H" 6 4981 0 5027 1995 m1
port "EN_VDDIO_SIG_H" 2 4472 0 4532 66 m1
port "PULLUP_H" 24 2911 0 3027 66 m1
port "ENABLE_H" 3 2457 0 2509 66 m1
node "VCCHIB" 0 0 14746 427 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VCCHIB" "VCCHIB"
node "VCCD" 0 0 14746 1797 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VCCD" "VCCD"
node "VCCHIB" 0 0 0 427 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VCCHIB" "VCCHIB"
node "VCCD" 0 0 0 1797 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VCCD" "VCCD"
node "VDDA" 0 0 14807 3007 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDA" "VDDA"
node "VDDA" 0 0 0 3007 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDA" "VDDA"
node "VDDIO" 0 0 14746 3977 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSIO" 0 0 14746 5187 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO" "VSSIO"
node "VSWITCH" 0 0 14746 6397 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSWITCH" "VSWITCH"
node "VSSA" 0 0 14746 7368 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "VSSD" 0 0 14746 8337 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSD" "VSSD"
node "VSSA" 0 0 14746 9547 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "VSSIO_Q" 0 0 14746 11667 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO_Q" "VSSIO_Q"
node "VDDIO_Q" 0 0 14746 12837 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDIO_Q" "VDDIO_Q"
node "VDDIO" 0 0 14746 14007 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VDDIO" 0 0 0 3977 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSIO" 0 0 0 5187 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO" "VSSIO"
node "VSWITCH" 0 0 0 6397 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSWITCH" "VSWITCH"
node "VSSA" 0 0 0 7368 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "VSSD" 0 0 0 8337 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSD" "VSSD"
node "VSSA" 0 0 0 9547 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "VSSIO_Q" 0 0 0 11667 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO_Q" "VSSIO_Q"
node "VDDIO_Q" 0 0 0 12837 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDIO_Q" "VDDIO_Q"
node "VDDIO" 0 0 0 14007 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "PAD" 0 0 3450 21691 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSIO" 0 0 14746 35157 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO" "VSSIO"
node "m5_0_19317#" 0 0 0 19317 obsm5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSIO" 0 0 0 35157 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO" "VSSIO"
node "VCCHIB" 0 0 14746 407 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VCCHIB" "VCCHIB"
node "VCCHIB" 0 0 0 407 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VCCD" 0 0 14746 1777 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VCCD" "VCCD"
node "VCCD" 0 0 0 1777 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VDDA" 0 0 14807 2987 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDA" "VDDA"
node "VDDA" 0 0 0 2987 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VDDIO" 0 0 14746 3957 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VDDIO" 0 0 0 3957 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSIO" 0 0 14746 5167 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO" "VSSIO"
node "VSSIO" 0 0 0 5167 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO" "VSSIO"
node "VSWITCH" 0 0 14746 6377 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSWITCH" "VSWITCH"
node "VSWITCH" 0 0 0 6377 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSA" 0 0 14746 7347 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "VSSA" 0 0 0 7347 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSD" 0 0 14746 8317 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSD" "VSSD"
equiv "VSSD" "VSSD"
equiv "VSSD" "VSSD"
node "VSSD" 0 0 0 8317 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "m4_193_1577#" 0 0 193 1577 obsm4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSA" 0 0 0 9547 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
equiv "VSSA" "VSSA"
equiv "VSSA" "VSSA"
node "AMUXBUS_B" 0 0 0 9673 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "AMUXBUS_B" "AMUXBUS_B"
equiv "AMUXBUS_B" "AMUXBUS_B"
node "VSSA" 0 0 14746 10329 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "m4_334_10349#" 0 0 334 10349 obsm4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSA" 0 0 0 10329 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
node "AMUXBUS_A" 0 0 0 10625 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "AMUXBUS_A" "AMUXBUS_A"
equiv "AMUXBUS_A" "AMUXBUS_A"
node "VSSA" 0 0 0 11281 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSA" "VSSA"
equiv "VSSA" "VSSA"
equiv "VSSA" "VSSA"
node "VSSIO_Q" 0 0 14746 11647 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO_Q" "VSSIO_Q"
node "VSSIO_Q" 0 0 0 11647 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VDDIO_Q" 0 0 14746 12817 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VDDIO_Q" "VDDIO_Q"
node "VDDIO_Q" 0 0 0 12817 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VDDIO" 0 0 14746 14007 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VDDIO" 0 0 0 14007 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSIO" 0 0 14746 35157 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "VSSIO" "VSSIO"
node "m4_193_11427#" 0 0 193 11427 obsm4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSIO" 0 0 0 35157 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "PAD_A_ESD_H" 0 0 3449 0 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "PAD_A_ESD_H" "PAD_A_ESD_H"
node "FILT_IN_H" 0 0 4015 0 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
node "XRES_H_N" 0 0 5787 0 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "XRES_H_N" "XRES_H_N"
equiv "XRES_H_N" "XRES_H_N"
equiv "XRES_H_N" "XRES_H_N"
equiv "XRES_H_N" "XRES_H_N"
equiv "XRES_H_N" "XRES_H_N"
equiv "XRES_H_N" "XRES_H_N"
equiv "XRES_H_N" "XRES_H_N"
equiv "XRES_H_N" "XRES_H_N"
equiv "XRES_H_N" "XRES_H_N"
equiv "XRES_H_N" "XRES_H_N"
node "FILT_IN_H" 0 0 4581 1996 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
equiv "FILT_IN_H" "FILT_IN_H"
node "ENABLE_VDDIO" 0 0 1680 0 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
node "ENABLE_VDDIO" 0 0 1690 6636 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
node "ENABLE_VDDIO" 0 0 1879 6799 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
equiv "ENABLE_VDDIO" "ENABLE_VDDIO"
node "TIE_WEAK_HI_H" 0 0 14438 0 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
equiv "TIE_WEAK_HI_H" "TIE_WEAK_HI_H"
node "m3_193_125#" 0 0 193 125 obsm3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "TIE_WEAK_HI_H" 0 0 14443 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "DISABLE_PULLUP_H" 0 0 6552 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "DISABLE_PULLUP_H" "DISABLE_PULLUP_H"
node "TIE_HI_ESD" 0 0 6101 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "TIE_HI_ESD" "TIE_HI_ESD"
node "XRES_H_N" 0 0 5787 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "TIE_LO_ESD" 0 0 5516 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "TIE_LO_ESD" "TIE_LO_ESD"
node "FILT_IN_H" 0 0 4015 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "PAD_A_ESD_H" 0 0 3449 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "PULLUP_H" 0 0 2911 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "PULLUP_H" "PULLUP_H"
node "ENABLE_H" 0 0 2457 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "ENABLE_H" "ENABLE_H"
node "ENABLE_VDDIO" 0 0 1685 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "EN_VDDIO_SIG_H" 0 0 4472 0 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
node "EN_VDDIO_SIG_H" 0 0 2254 6246 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
node "EN_VDDIO_SIG_H" 0 0 2252 7204 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
equiv "EN_VDDIO_SIG_H" "EN_VDDIO_SIG_H"
node "m2_68_0#" 0 0 68 0 obsm2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "DISABLE_PULLUP_H" 0 0 6552 0 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "TIE_HI_ESD" 0 0 6101 0 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "TIE_LO_ESD" 0 0 5516 0 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "INP_SEL_H" 0 0 4981 0 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "EN_VDDIO_SIG_H" 0 0 4472 0 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "PULLUP_H" 0 0 2911 0 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "ENABLE_H" 0 0 2457 0 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "m1_0_37#" 0 0 0 37 obsm1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "li_0_37#" 0 0 0 37 obsli 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0