tree 402716a854b60028ee1d035d750b46dd4bf8f309
parent 349f24d1bb713db86c6a1f0b67a40684a2afdd95
author Tim Edwards <tim@opencircuitdesign.com> 1608174680 -0500
committer Tim Edwards <tim@opencircuitdesign.com> 1608174680 -0500

Modified the io_ports testbench so that it passes the gate-level simulation.
Also, it exercises the method of using the internal loopback connection between
the SPI master and housekeeping SPI to keep the CSB signal at a known state so
that the GPIO[3] pin can be used as a user project output.