diff --git a/verilog/rtl/decred_top/rtl/src/register_bank.v b/verilog/rtl/decred_top/rtl/src/register_bank.v
index 798cb2f..cd8b105 100755
--- a/verilog/rtl/decred_top/rtl/src/register_bank.v
+++ b/verilog/rtl/decred_top/rtl/src/register_bank.v
@@ -1,3 +1,19 @@
+// Copyright 2020 Matt Aamold, James Aamold
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// Language: Verilog 2001
+
 `timescale 1ns / 1ps
 `include "decred_defines.v"