commit 7dcaaddb93d5faea9589012e32bdc8a33285214f
author SweeperAA <64485414+SweeperAA@users.noreply.github.com> Thu Dec 03 18:29:19 2020 -0500
committer GitHub <noreply@github.com> Thu Dec 03 18:29:19 2020 -0500
tree c317718169da2526c62c2e874e94a6f8b97d3158
parent 5172f23a6c6b16604837de44ab43b81e125f57aa

Update for 8 hash macros.

verilog/rtl/decred_top/rtl/src/decred.v

diff --git a/verilog/rtl/decred_top/rtl/src/decred.v b/verilog/rtl/decred_top/rtl/src/decred.v
index 9537bcc..e4f4c1e 100644
--- a/verilog/rtl/decred_top/rtl/src/decred.v
+++ b/verilog/rtl/decred_top/rtl/src/decred.v
@@ -141,7 +141,7 @@
   // Interface to regfile
 
 
-  regBank #(.NUM_OF_MACROS(4))
+  regBank #(.NUM_OF_MACROS(8))
   regBankBlock (
     .iCLK(SPI_CLK),
     .RST(rst_local),