tree aa0db5554e024223e07a063b304b52251d6f2514
parent 53d9218c9e1613c4616ca9d4f71195778520e66d
author Tim Edwards <tim@opencircuitdesign.com> 1602516731 -0400
committer Tim Edwards <tim@opencircuitdesign.com> 1602516731 -0400

Added a secondary clock output, going to the user area, that is derived
from the 90-degree phase PLL clock and run on an independent divider.
The use of the 90-degree phase clock is mostly to balance the output
loads.