)]}'
{
  "commit": "e6eda804fa840f8ccb66a5af2188044e5c23731b",
  "tree": "1682b55febc400571db2a63ccaf9f317a9023b26",
  "parents": [
    "0b6219d234cc044a8fb7ed7b544b26631d207577"
  ],
  "author": {
    "name": "Ahmed Ghazy",
    "email": "ax3ghazy@aucegypt.edu",
    "time": "Tue Oct 27 15:47:31 2020 +0200"
  },
  "committer": {
    "name": "Ahmed Ghazy",
    "email": "ax3ghazy@aucegypt.edu",
    "time": "Wed Oct 28 22:58:29 2020 +0200"
  },
  "message": "Fix a typo in a previous fix...\n\n- IO_PADS -\u003e PWR_PADS\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "99988145472f0ef5215b7065edd08419511efbde",
      "old_mode": 33188,
      "old_path": "verilog/rtl/mprj_ctrl.v",
      "new_id": "60ca9743b6cf594054de635d9e0c4a06663cbc38",
      "new_mode": 33188,
      "new_path": "verilog/rtl/mprj_ctrl.v"
    }
  ]
}