diff --git a/README.md b/README.md
index b1b8a08..2ba4d3a 100644
--- a/README.md
+++ b/README.md
@@ -10,7 +10,11 @@
 
 ### 1.3 - 3.6 GHz Fractional-N Phase Locked Loop
 
+
 ![pll](doc/vco_2-4GHz/vco_2-4GHz_layout.png)
+_VCO Layout_
+
+
 
 A S-Band phase locked loop employing a differential ring oscillator VCO with quadrature outputs. CML (Current Mode Logic) and flip-flop based pre-scaler dividers are used with a fractional-N divider which uses a 3rd order MASH structure with dithering. Finally a PFD (Phase Frequency Detector) is combined with a charge pump with off chip filtering to complete the loop.
 
@@ -19,6 +23,7 @@
 ### Bandgap
 
 ![bandgap](doc/bandgap_trimmed/bandgap_trimmed.png)
+_Bandgap Layout_
 
 A bandgap reference with separate PTAT and CTAT currents. Provides less than +/-0.2% variation from -40 to 125 degrees celcius (tt simulation).  6 bits of trimming on both PTAT and CTAT allows less than 1% accuracy over process variations.