[OpenPhySyn] [2020-11-20 11:56:37.584] [info] Loaded 6 transforms.
[OpenPhySyn] [2020-11-20 11:56:37.965] [info] OpenPhySyn: 1.8.1
Warning: /project/openlane/gpio_control_block/runs/gpio_control_block/tmp/opt.lib, line 32 default_operating_condition ss_100C_1v60 not found.
Notice 0: Reading LEF file:  /project/openlane/gpio_control_block/runs/gpio_control_block/tmp/merged_unpadded.lef
Notice 0:     Created 13 technology layers
Notice 0:     Created 25 technology vias
Notice 0:     Created 437 library cells
Notice 0: Finished LEF file:  /project/openlane/gpio_control_block/runs/gpio_control_block/tmp/merged_unpadded.lef
Notice 0: 
Reading DEF file: /project/openlane/gpio_control_block/runs/gpio_control_block/tmp/placement/replace.def
Notice 0: Design: gpio_control_block
Notice 0:     Created 24 pins.
Notice 0:     Created 163 components and 783 component-terminals.
Notice 0:     Created 79 nets and 210 connections.
Notice 0: Finished DEF file: /project/openlane/gpio_control_block/runs/gpio_control_block/tmp/placement/replace.def
[INFO]: Setting output delay to: 2.0
[INFO]: Setting input delay to: 2.0
[INFO]: Setting load to: 0.01765
=============== Initial Reports =============
Startpoint: resetn (input port clocked by serial_clock)
Endpoint: _088_ (recovery check against rising-edge clock serial_clock)
Path Group: **async_default**
Path Type: max

  Delay    Time   Description
---------------------------------------------------------
   0.00    0.00   clock serial_clock (rise edge)
   0.00    0.00   clock network delay (ideal)
   2.00    2.00 ^ input external delay
   0.03    2.03 ^ resetn (in)
   0.18    2.21 ^ _039_/X (sky130_fd_sc_hd__or2_4)
   0.20    2.41 ^ _040_/X (sky130_fd_sc_hd__buf_2)
   0.22    2.63 ^ _058_/X (sky130_fd_sc_hd__buf_2)
   0.18    2.81 ^ _062_/X (sky130_fd_sc_hd__buf_2)
   0.00    2.81 ^ _088_/SET_B (sky130_fd_sc_hd__dfstp_4)
           2.81   data arrival time

  10.00   10.00   clock serial_clock (rise edge)
   0.00   10.00   clock network delay (ideal)
   0.00   10.00   clock reconvergence pessimism
          10.00 ^ _088_/CLK (sky130_fd_sc_hd__dfstp_4)
   0.25   10.25   library recovery time
          10.25   data required time
---------------------------------------------------------
          10.25   data required time
          -2.81   data arrival time
---------------------------------------------------------
           7.44   slack (MET)


Startpoint: resetn (input port clocked by serial_clock)
Endpoint: _079_ (rising clock gating-check end-point clocked by serial_clock)
Path Group: **clock_gating_default**
Path Type: max

  Delay    Time   Description
---------------------------------------------------------
   0.00    0.00   clock serial_clock (rise edge)
   0.00    0.00   clock network delay (ideal)
   2.00    2.00 ^ input external delay
   0.03    2.03 ^ resetn (in)
   0.04    2.07 v _078_/Y (sky130_fd_sc_hd__inv_2)
   0.00    2.07 v _079_/B (sky130_fd_sc_hd__and2_4)
           2.07   data arrival time

  10.00   10.00   clock serial_clock (rise edge)
   0.00   10.00   clock network delay (ideal)
   0.00   10.00   clock reconvergence pessimism
          10.00 ^ _079_/A (sky130_fd_sc_hd__and2_4)
   0.00   10.00   clock gating setup time
          10.00   data required time
---------------------------------------------------------
          10.00   data required time
          -2.07   data arrival time
---------------------------------------------------------
           7.93   slack (MET)


Startpoint: mgmt_gpio_oeb (input port clocked by serial_clock)
Endpoint: pad_gpio_out (output port clocked by serial_clock)
Path Group: serial_clock
Path Type: max

  Delay    Time   Description
---------------------------------------------------------
   0.00    0.00   clock serial_clock (rise edge)
   0.00    0.00   clock network delay (ideal)
   2.00    2.00 v input external delay
   0.01    2.01 v mgmt_gpio_oeb (in)
   0.27    2.28 v _073_/X (sky130_fd_sc_hd__and3_4)
   0.44    2.72 v _074_/X (sky130_fd_sc_hd__or2_4)
   0.59    3.31 v _076_/X (sky130_fd_sc_hd__a32o_4)
   0.00    3.31 v pad_gpio_out (out)
           3.31   data arrival time

  10.00   10.00   clock serial_clock (rise edge)
   0.00   10.00   clock network delay (ideal)
   0.00   10.00   clock reconvergence pessimism
  -2.00    8.00   output external delay
           8.00   data required time
---------------------------------------------------------
           8.00   data required time
          -3.31   data arrival time
---------------------------------------------------------
           4.69   slack (MET)


Capacitance violations: 0
Transition violations: 0
wns 0.00
tns 0.00
Initial area: 13012 um2
OpenPhySyn timing repair:
[OpenPhySyn] [2020-11-20 11:56:42.391] [info] Invoking repair_timing transform
[OpenPhySyn] [2020-11-20 11:56:42.396] [info] Buffer library: sky130_fd_sc_hd__buf_4, sky130_fd_sc_hd__buf_8, sky130_fd_sc_hd__buf_2
[OpenPhySyn] [2020-11-20 11:56:42.396] [info] Inverter library: None
[OpenPhySyn] [2020-11-20 11:56:42.396] [info] Buffering: enabled
[OpenPhySyn] [2020-11-20 11:56:42.396] [info] Driver sizing: enabled
[OpenPhySyn] [2020-11-20 11:56:42.396] [info] Pin-swapping: enabled
[OpenPhySyn] [2020-11-20 11:56:42.396] [info] Mode: Timing-Driven
[OpenPhySyn] [2020-11-20 11:56:42.396] [info] Iteration 1
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] No more violations or cannot find more optimal buffer
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Runtime: 0s
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Buffers: 0
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Resize up: 0
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Resize down: 0
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Pin Swap: 0
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Buffered nets: 0
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Fanout violations: 0
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Transition violations: 0
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Capacitance violations: 0
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Slack gain: 0.0
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Initial area: 1301
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] New area: 1301
[OpenPhySyn] [2020-11-20 11:56:42.407] [info] Finished repair_timing transform (0)
Added/updated 0 cells
=============== Final Reports =============
Startpoint: resetn (input port clocked by serial_clock)
Endpoint: _088_ (recovery check against rising-edge clock serial_clock)
Path Group: **async_default**
Path Type: max

  Delay    Time   Description
---------------------------------------------------------
   0.00    0.00   clock serial_clock (rise edge)
   0.00    0.00   clock network delay (ideal)
   2.00    2.00 ^ input external delay
   0.03    2.03 ^ resetn (in)
   0.18    2.20 ^ _039_/X (sky130_fd_sc_hd__or2_4)
   0.20    2.40 ^ _040_/X (sky130_fd_sc_hd__buf_2)
   0.21    2.61 ^ _058_/X (sky130_fd_sc_hd__buf_2)
   0.18    2.79 ^ _062_/X (sky130_fd_sc_hd__buf_2)
   0.00    2.79 ^ _088_/SET_B (sky130_fd_sc_hd__dfstp_4)
           2.79   data arrival time

  10.00   10.00   clock serial_clock (rise edge)
   0.00   10.00   clock network delay (ideal)
   0.00   10.00   clock reconvergence pessimism
          10.00 ^ _088_/CLK (sky130_fd_sc_hd__dfstp_4)
   0.25   10.25   library recovery time
          10.25   data required time
---------------------------------------------------------
          10.25   data required time
          -2.79   data arrival time
---------------------------------------------------------
           7.46   slack (MET)


Startpoint: resetn (input port clocked by serial_clock)
Endpoint: _079_ (rising clock gating-check end-point clocked by serial_clock)
Path Group: **clock_gating_default**
Path Type: max

  Delay    Time   Description
---------------------------------------------------------
   0.00    0.00   clock serial_clock (rise edge)
   0.00    0.00   clock network delay (ideal)
   2.00    2.00 ^ input external delay
   0.03    2.03 ^ resetn (in)
   0.04    2.07 v _078_/Y (sky130_fd_sc_hd__inv_2)
   0.00    2.07 v _079_/B (sky130_fd_sc_hd__and2_4)
           2.07   data arrival time

  10.00   10.00   clock serial_clock (rise edge)
   0.00   10.00   clock network delay (ideal)
   0.00   10.00   clock reconvergence pessimism
          10.00 ^ _079_/A (sky130_fd_sc_hd__and2_4)
   0.00   10.00   clock gating setup time
          10.00   data required time
---------------------------------------------------------
          10.00   data required time
          -2.07   data arrival time
---------------------------------------------------------
           7.93   slack (MET)


Startpoint: mgmt_gpio_oeb (input port clocked by serial_clock)
Endpoint: pad_gpio_out (output port clocked by serial_clock)
Path Group: serial_clock
Path Type: max

  Delay    Time   Description
---------------------------------------------------------
   0.00    0.00   clock serial_clock (rise edge)
   0.00    0.00   clock network delay (ideal)
   2.00    2.00 v input external delay
   0.01    2.01 v mgmt_gpio_oeb (in)
   0.27    2.28 v _073_/X (sky130_fd_sc_hd__and3_4)
   0.44    2.72 v _074_/X (sky130_fd_sc_hd__or2_4)
   0.59    3.31 v _076_/X (sky130_fd_sc_hd__a32o_4)
   0.00    3.31 v pad_gpio_out (out)
           3.31   data arrival time

  10.00   10.00   clock serial_clock (rise edge)
   0.00   10.00   clock network delay (ideal)
   0.00   10.00   clock reconvergence pessimism
  -2.00    8.00   output external delay
           8.00   data required time
---------------------------------------------------------
           8.00   data required time
          -3.31   data arrival time
---------------------------------------------------------
           4.69   slack (MET)


Capacitance violations: 0
Transition violations: 0
wns 0.00
tns 0.00
Final area: 13012 um2
Export optimized design