)]}'
{
  "commit": "f328311ca3feab79919b3a57c4bb6b5aba2b23ae",
  "tree": "010087c65a898f714aaeea2997717c0116ba8e8f",
  "parents": [
    "6498e97a0ba36682fd57f0d73ba9a70756c8922f"
  ],
  "author": {
    "name": "Dan Rodrigues",
    "email": "danrr.gh.oss@gmail.com",
    "time": "Sun Nov 08 13:15:21 2020 +1100"
  },
  "committer": {
    "name": "Dan Rodrigues",
    "email": "danrr.gh.oss@gmail.com",
    "time": "Sun Nov 08 13:15:21 2020 +1100"
  },
  "message": "user_proj_example: fix wbs_ack_o wiring\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a72d99ea6fba6e0679274c61bad1c9279cc59f39",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_proj_example.v",
      "new_id": "f1feed5aa38d1bcaca885678015e2cb2d2c5d4fb",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_proj_example.v"
    }
  ]
}