)]}'
{
  "commit": "9e230f84b6bce82f76e54c1a09504abb7859552e",
  "tree": "43778b8ebdeb840fd67562387fe8c6aef7c02eb3",
  "parents": [
    "8839d6aeba31bef90a0171b0b6347dc6f098b10f"
  ],
  "author": {
    "name": "manarabdelaty",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Tue Dec 01 19:13:06 2020 +0200"
  },
  "committer": {
    "name": "manarabdelaty",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Tue Dec 01 19:13:06 2020 +0200"
  },
  "message": "Updated power net name in mgmt_core to match the one in the GL\n\n- should fix the rtl simulations\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "56ba46b72af576ae0a8959f00667c826bac54ec6",
      "old_mode": 33188,
      "old_path": "verilog/rtl/mgmt_core.v",
      "new_id": "cf2b996ba2ebbaa6731780ed1344e776f49bbe98",
      "new_mode": 33188,
      "new_path": "verilog/rtl/mgmt_core.v"
    }
  ]
}