blob: 820937b56c7f29c4bf2f4b25ac7b909a399277ea [file] [log] [blame]
Notice 0: Reading LEF file: /project/openlane/morphle_ycell/runs/morphle_ycell/tmp/merged.lef
Notice 0: Created 13 technology layers
Notice 0: Created 25 technology vias
Notice 0: Created 437 library cells
Notice 0: Finished LEF file: /project/openlane/morphle_ycell/runs/morphle_ycell/tmp/merged.lef
Notice 0:
Reading DEF file: /project/openlane/morphle_ycell/runs/morphle_ycell/results/routing/ycell.def
Notice 0: Design: ycell
Notice 0: Created 32 pins.
Notice 0: Created 360 components and 1719 component-terminals.
Notice 0: Created 2 special nets and 0 connections.
Notice 0: Created 125 nets and 341 connections.
Notice 0: Finished DEF file: /project/openlane/morphle_ycell/runs/morphle_ycell/results/routing/ycell.def
Top-level design name: ycell
Found port VPWR of type SIGNAL
Found port VGND of type SIGNAL
Power net: VPWR
Ground net: VGND
Modified power connections of 360 cells (Remaining: 0 ).