VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN mgmt_protect_hv ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 25000 25000 ) ;
ROW ROW_0 unithv 480 4070 FS DO 50 BY 1 STEP 480 0 ;
ROW ROW_1 unithv 480 8140 N DO 50 BY 1 STEP 480 0 ;
ROW ROW_2 unithv 480 12210 FS DO 50 BY 1 STEP 480 0 ;
ROW ROW_3 unithv 480 16280 N DO 50 BY 1 STEP 480 0 ;
TRACKS X 240 DO 52 STEP 480 LAYER li1 ;
TRACKS Y 240 DO 52 STEP 480 LAYER li1 ;
TRACKS X 185 DO 68 STEP 370 LAYER met1 ;
TRACKS Y 185 DO 68 STEP 370 LAYER met1 ;
TRACKS X 240 DO 52 STEP 480 LAYER met2 ;
TRACKS Y 240 DO 52 STEP 480 LAYER met2 ;
TRACKS X 370 DO 34 STEP 740 LAYER met3 ;
TRACKS Y 370 DO 34 STEP 740 LAYER met3 ;
TRACKS X 480 DO 26 STEP 960 LAYER met4 ;
TRACKS Y 480 DO 26 STEP 960 LAYER met4 ;
TRACKS X 1665 DO 8 STEP 3330 LAYER met5 ;
TRACKS Y 1665 DO 8 STEP 3330 LAYER met5 ;
COMPONENTS 4 ;
    - mprj2_logic_high_hvl sky130_fd_sc_hvl__conb_1 ;
    - mprj2_logic_high_lv sky130_fd_sc_hvl__lsbufhv2lv_1 ;
    - mprj_logic_high_hvl sky130_fd_sc_hvl__conb_1 ;
    - mprj_logic_high_lv sky130_fd_sc_hvl__lsbufhv2lv_1 ;
END COMPONENTS
PINS 2 ;
    - mprj2_vdd_logic1 + NET mprj2_vdd_logic1 + DIRECTION OUTPUT + USE SIGNAL + PLACED ( 21360 23000 ) N + LAYER met2 ( -140 -2000 ) ( 140 2000 ) ;
    - mprj_vdd_logic1 + NET mprj_vdd_logic1 + DIRECTION OUTPUT + USE SIGNAL + PLACED ( 3120 2000 ) N + LAYER met2 ( -140 -2000 ) ( 140 2000 ) ;
END PINS
NETS 4 ;
    - mprj2_vdd_logic1 ( PIN mprj2_vdd_logic1 ) ( mprj2_logic_high_lv X ) + USE SIGNAL ;
    - mprj_vdd_logic1 ( PIN mprj_vdd_logic1 ) ( mprj_logic_high_lv X ) + USE SIGNAL ;
    - mprj2_vdd_logic1_h ( mprj2_logic_high_lv A ) ( mprj2_logic_high_hvl HI ) + USE SIGNAL ;
    - mprj_vdd_logic1_h ( mprj_logic_high_lv A ) ( mprj_logic_high_hvl HI ) + USE SIGNAL ;
END NETS
END DESIGN