diff --git a/verilog/dv/caravel/mgmt_soc/gpio/Makefile b/verilog/dv/caravel/mgmt_soc/gpio/Makefile
index 9eba549..0a97393 100644
--- a/verilog/dv/caravel/mgmt_soc/gpio/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/gpio/Makefile
@@ -1,8 +1,8 @@
 FIRMWARE_PATH = ../..
 VERILOG_PATH = ../../../..
 RTL_PATH = $(VERILOG_PATH)/rtl
-IP_PATH = ../../../../ip
-BEHAVIOURAL_MODELS = ../../ 
+IP_PATH = $(PDK_ROOT)/sky130A
+BEHAVIOURAL_MODELS = ../../
 
 GCC_PATH?=/ef/apps/bin
 GCC_PREFIX?=riscv32-unknown-elf
@@ -22,11 +22,11 @@
 ifeq ($(SIM),RTL)
 	iverilog -DFUNCTIONAL -DSIM -I $(BEHAVIOURAL_MODELS) \
 	-I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
-	$< -o $@ 
-else  
+	$< -o $@
+else
 	iverilog -DFUNCTIONAL -DSIM -DGL -I $(BEHAVIOURAL_MODELS) \
 	-I $(PDK_PATH) -I $(IP_PATH) -I $(VERILOG_PATH) -I $(RTL_PATH) \
-	$< -o $@ 
+	$< -o $@
 endif
 
 %.vcd: %.vvp
@@ -36,7 +36,7 @@
 	${GCC_PATH}/${GCC_PREFIX}-gcc -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(FIRMWARE_PATH)/start.s $<
 
 %.hex: %.elf
-	${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@ 
+	${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@
 	# to fix flash base address
 	sed -i 's/@10000000/@00000000/g' $@
 
@@ -49,4 +49,3 @@
 	rm -f *.elf *.hex *.bin *.vvp *.vcd *.log
 
 .PHONY: clean hex all
-
diff --git a/verilog/rtl/mprj_logic_high.v b/verilog/rtl/mprj_logic_high.v
new file mode 100644
index 0000000..24cda90
--- /dev/null
+++ b/verilog/rtl/mprj_logic_high.v
@@ -0,0 +1,18 @@
+module mprj_logic_high (
+`ifdef USE_POWER_PINS
+    inout	   vccd1,
+    inout	   vssd1,
+`endif
+    output [458:0] HI
+);
+sky130_fd_sc_hd__conb_1 insts [458:0] (
+`ifdef USE_POWER_PINS
+                .VPWR(vccd1),
+                .VGND(vssd1),
+                .VPB(vccd1),
+                .VNB(vssd1),
+`endif
+                .HI(HI),
+                .LO()
+        );
+endmodule