)]}'
{
  "commit": "2517fa8538d616830340da4984502271fb902f19",
  "tree": "a62a20c21e5797527580bf0a50da0a86e6e3325e",
  "parents": [
    "a4f9b52d71dbb86678d0743e25b8229126b5da64"
  ],
  "author": {
    "name": "Ahmed Ghazy",
    "email": "ax3ghazy@aucegypt.edu",
    "time": "Sun Nov 08 23:34:41 2020 +0200"
  },
  "committer": {
    "name": "Ahmed Ghazy",
    "email": "ax3ghazy@aucegypt.edu",
    "time": "Sun Nov 08 23:34:41 2020 +0200"
  },
  "message": "Add USE_CUSTOM_DFFRAM guard\n\n- enable it to use the small custom DFFRAM; otherwise, use the generic\n  RAM verilog model\n- also updated the aspect ratio of the custom DFFRAM\n",
  "tree_diff": [
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      "new_path": "openlane/DFFRAM/config.tcl"
    },
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      "type": "rename",
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      "new_mode": 33188,
      "new_path": "verilog/rtl/DFFRAM.v",
      "score": 99
    },
    {
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      "old_mode": 33188,
      "old_path": "verilog/rtl/caravel.v",
      "new_id": "23fb906ef02f9c3e5d15b1a5e209735490b8d0eb",
      "new_mode": 33188,
      "new_path": "verilog/rtl/caravel.v"
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}