)]}'
{
  "commit": "8de57ee0e415f2a61b6083be5e21ad76b65c0a7e",
  "tree": "803f81a3883d8a265cf51903c9274a576baaff4c",
  "parents": [
    "03146337ba756bce57e4c840a723c13071869747"
  ],
  "author": {
    "name": "Kevin",
    "email": "kevindai02@outlook.com",
    "time": "Sun Jan 31 13:29:52 2021 -0500"
  },
  "committer": {
    "name": "Kevin",
    "email": "kevindai02@outlook.com",
    "time": "Sun Jan 31 13:29:52 2021 -0500"
  },
  "message": "Updated timer and prepare for reflow\n",
  "tree_diff": [
    {
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      "old_mode": 33188,
      "old_path": "verilog/rtl/hs32_user_proj/dev_timer.v",
      "new_id": "3b20e4930e9371fb7a6cf6eeed539e756510fd13",
      "new_mode": 33188,
      "new_path": "verilog/rtl/hs32_user_proj/dev_timer.v"
    },
    {
      "type": "modify",
      "old_id": "53cb12d24426cce72ffac6a8057f95df8a6108c5",
      "old_mode": 57344,
      "old_path": "verilog/rtl/hs32cpu",
      "new_id": "cf52da5f677e86c0391191d52955eabbf8ca59c6",
      "new_mode": 57344,
      "new_path": "verilog/rtl/hs32cpu"
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}