)]}'
{
  "commit": "4d7660e4faa1db86f979cd7db8153013dec8a1f4",
  "tree": "217ffb3cd2a4440e9cd2668b39ef636eabbdb054",
  "parents": [
    "493c4c2c3afcf45c52bf85e433df18e4df392e5d"
  ],
  "author": {
    "name": "Anthony Kung",
    "email": "hi@anth.dev",
    "time": "Thu Dec 24 08:07:51 2020 -0500"
  },
  "committer": {
    "name": "Anthony Kung",
    "email": "hi@anth.dev",
    "time": "Thu Dec 24 08:07:51 2020 -0500"
  },
  "message": "Added Automated Testing For Test #7\n\n- Enabled automated testing for test case 7\n\nCo-authored-by: Kevin Dai \u003ckevindai02@outlook.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6b4c87ca4419f3f44d28347779964a901634cdf2",
      "old_mode": 33188,
      "old_path": "verilog/dv/caravel/hs32_soc/test7/Makefile",
      "new_id": "700d951ad5ab4b5085a8f7528f39e13ba1ff3a41",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/hs32_soc/test7/Makefile"
    },
    {
      "type": "modify",
      "old_id": "21f94d23c14fbea5409e0ff6615f220006fccfb7",
      "old_mode": 33188,
      "old_path": "verilog/dv/caravel/hs32_soc/test7/README.md",
      "new_id": "232cc23e5032f9aad63f04a9727edd7a84e81f1f",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/hs32_soc/test7/README.md"
    },
    {
      "type": "modify",
      "old_id": "665977ffb438c90538cf587adc5520fcaf8e6e92",
      "old_mode": 33188,
      "old_path": "verilog/dv/caravel/hs32_soc/test7/test7_tb.v",
      "new_id": "a1281069879e1b057ce32f6005a89ffaf882dd93",
      "new_mode": 33188,
      "new_path": "verilog/dv/caravel/hs32_soc/test7/test7_tb.v"
    }
  ]
}