diff --git a/verilog/rtl/caravel.v b/verilog/rtl/caravel.v
index b42eedf..fffee90 100644
--- a/verilog/rtl/caravel.v
+++ b/verilog/rtl/caravel.v
@@ -344,8 +344,10 @@
 		.la_output(la_output_core),
 		.la_oen(la_oen),
 		// User Project IO Control
-		.mprj_pwrgood(mprj_pwrgood),
-		.mprj2_pwrgood(mprj2_pwrgood),
+		.mprj_vcc_pwrgood(mprj_vcc_pwrgood),
+		.mprj2_vcc_pwrgood(mprj2_vcc_pwrgood),
+		.mprj_vdd_pwrgood(mprj_vdd_pwrgood),
+		.mprj2_vdd_pwrgood(mprj2_vdd_pwrgood),
 		.mprj_io_loader_resetn(mprj_io_loader_resetn),
 		.mprj_io_loader_clock(mprj_io_loader_clock),
 		.mprj_io_loader_data(mprj_io_loader_data),
@@ -382,14 +384,20 @@
 	wire [3:0]  mprj_sel_o_user;
 	wire [31:0] mprj_adr_o_user;
 	wire [31:0] mprj_dat_o_user;
-	wire	    mprj_pwrgood;
-	wire	    mprj2_pwrgood;
+	wire	    mprj_vcc_pwrgood;
+	wire	    mprj2_vcc_pwrgood;
+	wire	    mprj_vdd_pwrgood;
+	wire	    mprj2_vdd_pwrgood;
 
 	mgmt_protect mgmt_buffers (
 		.vccd(vccd),
 		.vssd(vssd),
 		.vccd1(vccd1),
 		.vssd1(vssd1),
+		.vdda1(vdda1),
+		.vssa1(vssa1),
+		.vdda2(vdda2),
+		.vssa2(vssa2),
 
 		.caravel_clk(caravel_clk),
 		.caravel_clk2(caravel_clk2),
@@ -413,8 +421,10 @@
 		.mprj_adr_o_user(mprj_adr_o_user),
 		.mprj_dat_o_user(mprj_dat_o_user),
 		.la_data_in_mprj(la_data_in_mprj),
-		.user1_powergood(mprj_pwrgood),
-		.user2_powergood(mprj2_pwrgood)
+		.user1_vcc_powergood(mprj_vcc_pwrgood),
+		.user2_vcc_powergood(mprj2_vcc_pwrgood),
+		.user1_vdd_powergood(mprj_vdd_pwrgood),
+		.user2_vdd_powergood(mprj2_vdd_pwrgood)
 	);