diff --git a/verilog/rtl/README b/verilog/rtl/README
index 5c05935..bc1d751 100644
--- a/verilog/rtl/README
+++ b/verilog/rtl/README
@@ -43,7 +43,7 @@
 	mprj_io[4]	SCK, housekeeping SPI
 	mprj_io[5]	Rx, UART
 	mprj_io[6]	Tx, UART
-	mrpj_io[7]	IRQ
+	mprj_io[7]	IRQ
 
     The next 4 user GPIO are designed to be used with an SPI flash controller in
     the user space.  They allow the four pins to be overridden by the housekeeping