)]}'
{
  "commit": "d435614fa36cde3c483c7ab771170a446dedc9ff",
  "tree": "d0fe7f3c5cca139d378482ec9aa862d340666d20",
  "parents": [
    "00258e10613f1157c667cddad652843e52acdf77"
  ],
  "author": {
    "name": "Dan Rodrigues",
    "email": "danrr.gh.oss@gmail.com",
    "time": "Fri Dec 18 12:04:24 2020 +1100"
  },
  "committer": {
    "name": "Dan Rodrigues",
    "email": "danrr.gh.oss@gmail.com",
    "time": "Fri Dec 18 12:04:24 2020 +1100"
  },
  "message": "Default to GL sim\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8b077a1e1556818496023784d3db53c4d7fae4be",
      "old_mode": 33188,
      "old_path": "verilog/dv/vdp_lite/core.mk",
      "new_id": "5dfdda0970f84d143aff6184d81d977ca5374ebc",
      "new_mode": 33188,
      "new_path": "verilog/dv/vdp_lite/core.mk"
    }
  ]
}