)]}'
{
  "commit": "710e8688f8ac7a6e7e48e37bf384ca806d4138ef",
  "tree": "e3c168e7d1ee3b3292939d36ba7e5929e28727f0",
  "parents": [
    "7fecba9c4d5be1200c2bcf8e178bbd103501bb36"
  ],
  "author": {
    "name": "Ahmed Ghazy",
    "email": "ahmed.ghazy@efabless.com",
    "time": "Wed Jan 13 14:00:26 2021 +0000"
  },
  "committer": {
    "name": "Ahmed Ghazy",
    "email": "ahmed.ghazy@efabless.com",
    "time": "Wed Jan 13 14:00:26 2021 +0000"
  },
  "message": "RTL of DFFRAM updated\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7011bb9646291fe8c14f150aac3a64df8f59ff1d",
      "old_mode": 33188,
      "old_path": "verilog/rtl/DFFRAM.v",
      "new_id": "73ad0ad3f31c7ea9cd72d14c4533a0970ea8fabe",
      "new_mode": 33188,
      "new_path": "verilog/rtl/DFFRAM.v"
    },
    {
      "type": "modify",
      "old_id": "ad75f2264aaee1b0e700a832015f9e5e472e98d8",
      "old_mode": 33188,
      "old_path": "verilog/rtl/DFFRAMBB.v",
      "new_id": "efa97257365206c70e9b521d3e38e4b62f3c0d9f",
      "new_mode": 33188,
      "new_path": "verilog/rtl/DFFRAMBB.v"
    },
    {
      "type": "modify",
      "old_id": "29760a868529afd89034414f2143144f24cfcbf5",
      "old_mode": 33188,
      "old_path": "verilog/rtl/RAM_6Kx32.v",
      "new_id": "0ca62fa98c0a030cadb7b343dc299b6787dc1e16",
      "new_mode": 33188,
      "new_path": "verilog/rtl/RAM_6Kx32.v"
    }
  ]
}
