|author||Jeff DiCorpo <firstname.lastname@example.org>||Thu Aug 19 09:32:29 2021 +0000|
|committer||Jeff DiCorpo <email@example.com>||Thu Aug 19 09:32:29 2021 +0000|
final gds & signoff results
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.