Update README to reflect project purpose.
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  1. .travis.yml
  2. .travisCI/
  3. LICENSE
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  5. README.md
  6. def/
  7. doc/
  8. gds/
  9. info.yaml
  10. lef/
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  12. mag/
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  14. mpw-one-b.md
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  18. scripts/
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README.md

OSU RISC-V Caravel

This is an implementation of a single-cycle RISC-V processor inside of the Caravel test system for use in the SkyWater 130nm PDK.