tree: 5496e43f5b2ab24b851293f181138dbf79b431ca [path history] [tgz]
  1. OpenFPGA_task/
  2. checks/
  3. def/
  4. doc/
  5. gds/
  6. lef/
  7. macros/
  8. mag/
  9. maglef/
  10. ngspice/
  11. openlane/
  12. qflow/
  13. scripts/
  14. spi/
  15. utils/
  16. verilog/
  17. LICENSE
  18. Makefile
  19. README.md
  20. info.yaml
  21. mpw-one-b.md
  22. source_commit_hash.txt
README.md

Caravel-QLSOFA-HD

Highlights

  • Opensource 12x12 FPGA designed using OpenFPGA prototyping tool
  • Designed with Skywater130nm PDK with HD standard cell library + and Custom Transmission Gate Cells
  • Base K4 architecture from VPR with 60 vertical and horizontal channels
  • Soft adder implementation
  • Designed using commercial PnR tool

Contribution

NOTE

  • This repository is created for The eFabless Open MPW shuttle program submission
  • The repository is auto-updated. For any commits issues and feature requests, please check Skywater-OpenFPGA

Caravel design and CIIC Harness

For caravel related updated refer efabless/caravel