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  1. 09c1750 [Localrun03] Added chip art + drc clean by Ganesh Gore · 5 weeks ago master
  2. 10c1ee3 [Localrun03] All clean by Ganesh Gore · 5 weeks ago
  3. 7ee0335 [Fix] Fixed repo by Ganesh Gore · 5 weeks ago
  4. 4490d08 Merge tag 'tags/mpw-one-b' by Ganesh Gore · 6 weeks ago
  5. f48448d Merge pull request #29 from efabless/develop by Amr A. Gouhar · 6 weeks ago



  • Opensource 12x12 FPGA designed using OpenFPGA prototyping tool
  • Designed with Skywater130nm PDK with HD standard cell library
  • Base K4 architecture from VPR with 60 vertical and horizontal channels
  • Soft adder implementation
  • Designed using commercial PnR tool



  • This repository is created for The eFabless Open MPW shuttle program submission
  • The repository is auto-updated. For any commits issues and feature requests, please check Skywater-OpenFPGA

Caravel design and CIIC Harness

For caravel related updated refer efabless/caravel