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  1. 9e0d6fc - Update in fill to include poly. by Ubuntu · 5 weeks ago master
  2. 7283109 - Adding Fill shapes. by Ubuntu · 5 weeks ago
  3. 3f6c0fe final without drc by Ubuntu · 5 weeks ago
  4. c329d3d changes by Ubuntu · 5 weeks ago
  5. 90a27af modificiation by mina_maksimous · 5 weeks ago

Analog and RF Testchip on Skywaters 130nm Technology.

In this tapeout, we are planning to achieve the following:

  • 5 Transistor OTA with trimming resistors to adjust bias. [Completed with Layout, without the trimming resistor]
  • LDO [Schematic is complete, no layout currently]
  • VCO at 2.45GHz for BT, Wifi applications [Tentative plan and in progress]

OTA Design

  • Simulated specs
spec/cornerttfssfssff
Gain36db36db36.1db36.2db35.8db
BW10Mega Hz12.6Mgea Hz10Mega Hz10Mega Hz10 Mega Hz
GBW64Mega80 Mega64 Mega65 Mega62Mega
power82.5 uw98.6 uw67 uw96 uw70 uw
phase margin92 degre94 degree93degree93 degree94 degree
cmrr59.2db55.8db61.7db56.2db61.5

LDO Design

  • Input voltage is 1.8V
  • Will add the specs later.

Schedule and timeline:

Monday December 7th, 2020

  • Complete the layout of trimming resistor for biasing of the 5 Transistor OTA

Thursday December 10th, 2020

  • Complete the LDO layout.

Thursday December 17th, 2020

  • Add a second stage for the OTA and have double stage OTA to achieve higher gain.

Contributers