|author||Ahmed Ghazy <email@example.com>||Wed Nov 25 18:38:42 2020 +0200|
|committer||Ahmed Ghazy <firstname.lastname@example.org>||Wed Nov 25 18:38:42 2020 +0200|
Minor RTL fixes, switching to wrapped GPIOV2 - use USER2_ABUTMENT_PINS for the second of the vssio and vddio pads - do core-facing power-to-signal connections using the auto-router - fix corner pad power connections and keep them for LVS purposes - add a bunch of missing USE_POWER_PINS guards
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC can be found here
This is the user space. It has limited silicon area (TBD, about 3.1mm x 3.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: