blob: 27a8ddfa778540235129e0ecfe312c8e772fb535 [file] [log] [blame]
v { version=2.9.8 file_version=1.2}
G {}
K {}
V {}
S {}
E {}
N 480 -300 480 -270 { lab=GND}
N 570 -300 570 -270 { lab=vss}
N 570 -390 570 -360 { lab=vdd}
N 480 -390 480 -360 { lab=vss}
N 0 30 -0 60 { lab=9}
N 0 -60 -0 -30 { lab=10}
N -80 0 -40 -0 { lab=out_ring}
N 0 -80 0 -60 { lab=10}
N 50 -0 70 0 { lab=o1}
N 160 -0 180 -0 { lab=o2}
N 270 -0 290 0 { lab=o3}
N 380 -0 400 -0 { lab=o4}
N 490 -0 510 0 { lab=o5}
N 110 30 110 60 { lab=9}
N 220 30 220 60 { lab=9}
N 330 30 330 60 { lab=9}
N 440 30 440 60 { lab=9}
N 550 30 550 60 { lab=9}
N 110 -80 110 -30 { lab=10}
N 220 -80 220 -30 { lab=10}
N 330 -80 330 -30 { lab=10}
N 440 -80 440 -30 { lab=10}
N 550 -80 550 -30 { lab=10}
N 2520 0 2620 0 { lab=out}
N -0 -80 550 -80 { lab=10}
N 550 -80 640 -80 { lab=10}
N 290 -200 290 -80 { lab=10}
N -160 -230 250 -230 { lab=5}
N -200 -200 -200 150 { lab=5}
N -160 180 250 180 { lab=in}
N -200 -310 -200 -260 { lab=vdd}
N -200 -310 290 -310 { lab=vdd}
N 290 -310 290 -260 { lab=vdd}
N 290 -230 360 -230 { lab=vdd}
N 360 -310 360 -230 { lab=vdd}
N 290 -310 360 -310 { lab=vdd}
N -270 -230 -200 -230 { lab=vdd}
N -270 -310 -270 -230 { lab=vdd}
N -270 -310 -200 -310 { lab=vdd}
N -200 210 -200 250 { lab=vss}
N -200 250 290 250 { lab=vss}
N 290 210 290 250 { lab=vss}
N 290 180 370 180 { lab=vss}
N 370 180 370 250 { lab=vss}
N 290 250 370 250 { lab=vss}
N -280 180 -200 180 { lab=vss}
N -280 180 -280 250 { lab=vss}
N -280 250 -200 250 { lab=vss}
N -200 -140 -120 -140 { lab=5}
N -120 -230 -120 -140 { lab=5}
N 2360 -30 2360 30 { lab=out_ring}
N 2360 0 2420 0 { lab=out_ring}
N 2290 60 2320 60 { lab=#net1}
N 2290 -60 2290 60 { lab=#net1}
N 2290 -60 2320 -60 { lab=#net1}
N 2360 -120 2360 -90 { lab=10}
N 2290 -120 2360 -120 { lab=10}
N 2290 -120 2290 -80 { lab=10}
N 640 -80 690 -80 { lab=10}
N 2360 90 2360 120 { lab=9}
N 2290 120 2360 120 { lab=9}
N 2290 80 2290 120 { lab=9}
N 290 80 690 80 { lab=9}
N 290 80 290 150 { lab=9}
N 330 60 330 80 { lab=9}
N 440 60 440 80 { lab=9}
N 550 60 550 80 { lab=9}
N -0 80 290 80 { lab=9}
N -0 60 0 80 { lab=9}
N 110 60 110 80 { lab=9}
N 220 60 220 80 { lab=9}
N 2520 -30 2520 30 { lab=out}
N 2520 90 2520 120 { lab=vss}
N 2520 120 2610 120 { lab=vss}
N 2610 60 2610 120 { lab=vss}
N 2520 60 2610 60 { lab=vss}
N 2450 60 2480 60 { lab=out_ring}
N 2450 -60 2450 60 { lab=out_ring}
N 2450 -60 2480 -60 { lab=out_ring}
N 2420 0 2450 0 { lab=out_ring}
N 2520 -120 2520 -90 { lab=vdd}
N 2520 -120 2600 -120 { lab=vdd}
N 2600 -120 2600 -60 { lab=vdd}
N 2520 -60 2600 -60 { lab=vdd}
N 670 -300 670 -270 { lab=vss}
N 670 -390 670 -360 { lab=in}
N 2360 -60 2420 -60 { lab=10}
N 2420 -120 2420 -60 { lab=10}
N 2360 -120 2420 -120 { lab=10}
N 2360 60 2440 60 { lab=vss}
N 2440 60 2440 120 { lab=vss}
N 600 -0 620 -0 { lab=o6}
N 710 -0 730 -0 { lab=o7}
N 690 80 910 80 { lab=9}
N 690 -80 910 -80 { lab=10}
N 660 -80 660 -30 { lab=10}
N 770 -80 770 -30 { lab=10}
N 770 30 770 80 { lab=9}
N 660 30 660 80 { lab=9}
N 910 80 1180 80 { lab=9}
N 910 -80 1180 -80 { lab=10}
N -60 10 -40 10 { lab=vss}
N -60 10 -60 50 { lab=vss}
N -60 50 720 50 { lab=vss}
N 720 10 730 10 { lab=vss}
N 720 10 720 50 { lab=vss}
N 610 10 620 10 { lab=vss}
N 610 10 610 50 { lab=vss}
N 500 10 510 10 { lab=vss}
N 500 10 500 50 { lab=vss}
N 390 10 400 10 { lab=vss}
N 390 10 390 50 { lab=vss}
N 60 10 70 10 { lab=vss}
N 60 10 60 50 { lab=vss}
N 280 10 290 10 { lab=vss}
N 280 10 280 50 { lab=vss}
N 170 10 180 10 { lab=vss}
N 170 10 170 50 { lab=vss}
N 820 -0 840 -0 { lab=o8}
N 930 -0 950 -0 { lab=#net2}
N 1040 -0 1060 0 { lab=#net3}
N 1150 -0 1180 -0 { lab=#net4}
N 720 50 1160 50 { lab=vss}
N 1160 10 1160 50 { lab=vss}
N 1160 10 1180 10 { lab=vss}
N 1050 10 1060 10 { lab=vss}
N 1050 10 1050 50 { lab=vss}
N 940 10 950 10 { lab=vss}
N 940 10 940 50 { lab=vss}
N 830 10 840 10 { lab=vss}
N 830 10 830 50 { lab=vss}
N 880 30 880 80 { lab=9}
N 880 -80 880 -30 { lab=10}
N 990 -80 990 -30 { lab=10}
N 990 30 990 80 { lab=9}
N 1100 30 1100 80 { lab=9}
N 1100 -80 1100 -30 { lab=10}
N 1220 30 1220 80 { lab=9}
N 1180 80 1220 80 { lab=9}
N 1220 -80 1220 -30 { lab=10}
N 1180 -80 1220 -80 { lab=10}
N 1220 80 1820 80 { lab=9}
N 1220 -80 1820 -80 { lab=10}
N 1340 30 1340 80 { lab=9}
N 1340 -80 1340 -30 { lab=10}
N 1460 30 1460 80 { lab=9}
N 1460 -80 1460 -30 { lab=10}
N 1580 -80 1580 -30 { lab=10}
N 1580 30 1580 80 { lab=9}
N 1160 50 1640 50 { lab=vss}
N 1640 10 1640 50 { lab=vss}
N 1640 10 1660 10 { lab=vss}
N 1520 10 1540 10 { lab=vss}
N 1520 10 1520 50 { lab=vss}
N 1400 10 1420 10 { lab=vss}
N 1400 10 1400 50 { lab=vss}
N 1280 10 1300 10 { lab=vss}
N 1280 10 1280 50 { lab=vss}
N 1700 30 1700 80 { lab=9}
N 1700 -80 1700 -30 { lab=10}
N 1630 0 1660 0 { lab=#net5}
N 1510 0 1540 0 { lab=#net6}
N 1390 -0 1420 0 { lab=#net7}
N 1270 0 1300 -0 { lab=#net8}
N 1820 80 2030 80 { lab=9}
N 1820 -80 2030 -80 { lab=10}
N 1750 0 1780 -0 { lab=#net9}
N 1640 50 1760 50 { lab=vss}
N 1760 10 1760 50 { lab=vss}
N 1760 10 1780 10 { lab=vss}
N 1760 50 1880 50 { lab=vss}
N 1880 10 1880 50 { lab=vss}
N 1880 10 1910 10 { lab=vss}
N 1820 30 1820 80 { lab=9}
N 1950 30 1950 80 { lab=9}
N 2260 0 2290 0 { lab=#net1}
N 1950 -80 1950 -30 { lab=10}
N 1820 -80 1820 -30 { lab=10}
N 1870 -0 1910 -0 { lab=#net10}
N 2010 10 2010 50 { lab=vss}
N 2010 10 2030 10 { lab=vss}
N 2010 50 2130 50 { lab=vss}
N 2130 10 2130 50 { lab=vss}
N 2130 10 2160 10 { lab=vss}
N 2120 0 2160 0 { lab=#net11}
N 2000 0 2030 -0 { lab=#net12}
N 1880 50 2010 50 { lab=vss}
N 2030 80 2200 80 { lab=9}
N 2200 30 2200 80 { lab=9}
N 2200 -80 2200 -30 { lab=10}
N 2030 -80 2200 -80 { lab=10}
N 2070 -80 2070 -30 { lab=10}
N 2070 30 2070 80 { lab=9}
N 2250 0 2260 -0 { lab=#net1}
N 2200 80 2290 80 { lab=9}
N 2200 -80 2290 -80 { lab=10}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 0 0 0 0 {name=x1}
C {vsource.sym} 480 -330 0 0 {name=V1 value=DC\{Vss\}}
C {vsource.sym} 570 -330 0 0 {name=V2 value=DC\{Vdd\}}
C {gnd.sym} 480 -270 0 0 {name=l1 lab=GND}
C {lab_pin.sym} 480 -390 1 0 {name=l3 sig_type=std_logic lab=vss}
C {lab_pin.sym} 570 -270 3 0 {name=l2 sig_type=std_logic lab=vss}
C {lab_pin.sym} 570 -390 1 0 {name=l9 sig_type=std_logic lab=vdd
}
C {netlist_not_shown.sym} 790 -380 0 0 {name=SIMULATION only_toplevel=false
value="
* Circuit Parameters
.param vdd = 1.8
.param vss = 0.0
.param vin = 1
.param iref = 200u
.options TEMP = 65.0
* Include Models
.lib ~/skywater_pdk/skywater-pdk/libraries/sky130_fd_pr/latest/models/corners/sky130.lib TT
* OP Parameters & Singals to save
.save all
+ @M.X2.XM1.msky130_fd_pr__nfet_01v8[id] @M.X2.XM1.msky130_fd_pr__nfet_01v8[vth] @M.X2.XM1.msky130_fd_pr__nfet_01v8[vgs] @M.X2.XM1.msky130_fd_pr__nfet_01v8[vds] @M.X2.XM1.msky130_fd_pr__nfet_01v8[vdsat] @M.X2.XM1.msky130_fd_pr__nfet_01v8[gm] @M.X2.XM1.msky130_fd_pr__nfet_01v8[gds] @M.X2.XM1.msky130_fd_pr__nfet_01v8[cgs] @M.X2.XM1.msky130_fd_pr__nfet_01v8[cgd]
+ @M.X2.XM2.msky130_fd_pr__pfet_01v8[id] @M.X2.XM2.msky130_fd_pr__pfet_01v8[vth] @M.X2.XM2.msky130_fd_pr__pfet_01v8[vgs] @M.X2.XM2.msky130_fd_pr__pfet_01v8[vds] @M.X2.XM2.msky130_fd_pr__pfet_01v8[vdsat] @M.X2.XM2.msky130_fd_pr__pfet_01v8[gm] @M.X2.XM2.msky130_fd_pr__pfet_01v8[gds] @M.X2.XM1.msky130_fd_pr__nfet_01v8[cgs] @M.X2.XM1.msky130_fd_pr__nfet_01v8[cgd]
+ @M.XM6.msky130_fd_pr__nfet_01v8[id] @M.XM6.msky130_fd_pr__nfet_01v8[vth] @M.XM6.msky130_fd_pr__nfet_01v8[vgs] @M.XM6.msky130_fd_pr__nfet_01v8[vds] @M.XM6.msky130_fd_pr__nfet_01v8[vdsat] @M.XM6.msky130_fd_pr__nfet_01v8[gm] @M.XM6.msky130_fd_pr__nfet_01v8[gds] @M.XM6.msky130_fd_pr__nfet_01v8[cgs] @M.XM6.msky130_fd_pr__nfet_01v8[cgd]
+ @M.XM5.msky130_fd_pr__pfet_01v8[id] @M.XM5.msky130_fd_pr__pfet_01v8[vth] @M.XM5.msky130_fd_pr__pfet_01v8[vgs] @M.XM5.msky130_fd_pr__pfet_01v8[vds] @M.XM5.msky130_fd_pr__pfet_01v8[vdsat] @M.XM5.msky130_fd_pr__pfet_01v8[gm] @M.XM5.msky130_fd_pr__pfet_01v8[gds] @M.XM5.msky130_fd_pr__nfet_01v8[cgs] @M.XM5.msky130_fd_pr__nfet_01v8[cgd]
*Simulations
.control
*reset
tran 0.05n 1u
setplot tran1
plot v(out) v(in)
linearize
set specwindow="blackman"
fft v(out)
spec 10 1000000 1000 v(out)
plot mag(v(out))
*write ~/caravel_fulgor_opamp/xschem/sim_results/opamp_closeloop_tran1.raw
*dc V3 0 1.8 0.01
*setplot dc1
*plot v(out1) v(out2) v(out3) v(in)
reset
op
setplot op1
.endc
.end
"}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 110 0 0 0 {name=x2}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 220 0 0 0 {name=x3}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 330 0 0 0 {name=x4}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 440 0 0 0 {name=x5}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 550 0 0 0 {name=x6}
C {lab_pin.sym} -80 0 0 0 {name=l5 sig_type=std_logic lab=out_ring}
C {lab_wire.sym} 2570 -120 0 0 {name=l11 sig_type=std_logic lab=vdd}
C {lab_wire.sym} 2570 120 0 0 {name=l14 sig_type=std_logic lab=vss}
C {sky130_fd_pr/nfet_01v8.sym} 2340 60 0 0 {name=M1
L=0.15
W=1.2
ad="'W * 0.29'" pd="'2 * (W + 0.29)'"
as="'W * 0.29'" ps="'2 * (W + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
nf=1 mult=1
model=nfet_01v8
spiceprefix=X
}
C {sky130_fd_pr/pfet_01v8.sym} 2340 -60 0 0 {name=M2
L=0.15
W=1.5
ad="'W * 0.29'" pd="'2 * (W + 0.29)'"
as="'W * 0.29'" ps="'2 * (W + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
nf=1 mult=2
model=pfet_01v8
spiceprefix=X
}
C {sky130_fd_pr/nfet_01v8.sym} 2500 60 0 0 {name=M3
L=0.15
W=0.6
ad="'W * 0.29'" pd="'2 * (W + 0.29)'"
as="'W * 0.29'" ps="'2 * (W + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
nf=1 mult=1
model=nfet_01v8
spiceprefix=X
}
C {sky130_fd_pr/pfet_01v8.sym} 2500 -60 0 0 {name=M4
L=0.15
W=1.5
ad="'W * 0.29'" pd="'2 * (W + 0.29)'"
as="'W * 0.29'" ps="'2 * (W + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
nf=1 mult=1
model=pfet_01v8
spiceprefix=X
}
C {lab_wire.sym} 2420 0 0 0 {name=l4 sig_type=std_logic lab=out_ring}
C {lab_pin.sym} 2620 0 2 0 {name=l6 sig_type=std_logic lab=out}
C {sky130_fd_pr/pfet_01v8.sym} 270 -230 0 0 {name=M5
L=0.15
W=1.5
ad="'W * 0.29'" pd="'2 * (W + 0.29)'"
as="'W * 0.29'" ps="'2 * (W + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
nf=1 mult=1
model=pfet_01v8
spiceprefix=X
}
C {sky130_fd_pr/nfet_01v8.sym} 270 180 0 0 {name=M6
L=0.15
W=1.5
ad="'W * 0.29'" pd="'2 * (W + 0.29)'"
as="'W * 0.29'" ps="'2 * (W + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
nf=1 mult=1
model=nfet_01v8
spiceprefix=X
}
C {sky130_fd_pr/pfet_01v8.sym} -180 -230 0 1 {name=M7
L=0.15
W=0.9
ad="'W * 0.29'" pd="'2 * (W + 0.29)'"
as="'W * 0.29'" ps="'2 * (W + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
nf=1 mult=1
model=pfet_01v8
spiceprefix=X
}
C {sky130_fd_pr/nfet_01v8.sym} -180 180 0 1 {name=M8
L=0.15
W=0.9
ad="'W * 0.29'" pd="'2 * (W + 0.29)'"
as="'W * 0.29'" ps="'2 * (W + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
nf=1 mult=1
model=nfet_01v8
spiceprefix=X
}
C {lab_wire.sym} 60 -230 0 0 {name=l7 sig_type=std_logic lab=5}
C {lab_wire.sym} 60 -310 0 0 {name=l8 sig_type=std_logic lab=vdd}
C {lab_wire.sym} 40 250 0 0 {name=l10 sig_type=std_logic lab=vss}
C {lab_wire.sym} 40 180 0 0 {name=l12 sig_type=std_logic lab=in}
C {lab_wire.sym} 290 -140 3 0 {name=l13 sig_type=std_logic lab=10}
C {lab_wire.sym} 290 100 3 0 {name=l15 sig_type=std_logic lab=9}
C {lab_wire.sym} 60 0 0 0 {name=l16 sig_type=std_logic lab=o1}
C {lab_wire.sym} 170 0 0 0 {name=l17 sig_type=std_logic lab=o2}
C {lab_wire.sym} 280 0 0 0 {name=l18 sig_type=std_logic lab=o3}
C {lab_wire.sym} 390 0 0 0 {name=l19 sig_type=std_logic lab=o4}
C {lab_wire.sym} 500 0 0 0 {name=l20 sig_type=std_logic lab=o5}
C {lab_wire.sym} 610 0 0 0 {name=l21 sig_type=std_logic lab=o6}
C {vsource.sym} 670 -330 0 0 {name=V3 value=DC\{Vin\}}
C {lab_pin.sym} 670 -270 3 0 {name=l22 sig_type=std_logic lab=vss}
C {lab_pin.sym} 670 -390 1 0 {name=l23 sig_type=std_logic lab=in}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 660 0 0 0 {name=x7}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 770 0 0 0 {name=x8}
C {lab_wire.sym} 720 0 0 0 {name=l24 sig_type=std_logic lab=o7}
C {lab_wire.sym} 830 0 0 0 {name=l25 sig_type=std_logic lab=o8}
C {lab_wire.sym} -30 50 0 0 {name=l26 sig_type=std_logic lab=vss}
C {lab_pin.sym} 2440 120 3 0 {name=l27 sig_type=std_logic lab=vss}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 880 0 0 0 {name=x9}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 990 0 0 0 {name=x10}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 1100 0 0 0 {name=x11}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 1220 0 0 0 {name=x12}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 1340 0 0 0 {name=x13}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 1460 0 0 0 {name=x14}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 1580 0 0 0 {name=x15}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 1700 0 0 0 {name=x16}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 1820 0 0 0 {name=x17}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 1950 0 0 0 {name=x18}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 2070 0 0 0 {name=x19}
C {/home/dhernando/caravel_fulgor_opamp/xschem/ring_vco/not.sym} 2200 0 0 0 {name=x20}