|author||Tim Edwards <firstname.lastname@example.org>||Sun Nov 22 10:47:50 2020 -0500|
|committer||Tim Edwards <email@example.com>||Sun Nov 22 10:47:50 2020 -0500|
Revised the POR layout, which includes making use of the updated parameterized PDK cells with vias to metal1 included. This changed the hash name of the cells and so left behind a number of unreferenced cells, which have been deleted.
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC can be found here
This is the user space. It has limited silicon area (TBD, about 3.1mm x 3.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: