|author||Manar <firstname.lastname@example.org>||Tue Nov 10 19:26:28 2020 +0200|
|committer||Manar <email@example.com>||Tue Nov 10 19:32:02 2020 +0200|
Renamed lvs guard to use_power_pins - Also, added guard to the cells in the custom memory - dropped DLVS from the dv Makefiles
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: