Finalized caravel-tapeout.tar.gz to be used for TapeOut.
8 files changed
tree: abdba600180158585a3dfd7e19550fc7e1328430
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. lib/
  7. mag/
  8. maglef/
  9. openlane/
  10. sdc/
  11. sdf/
  12. signoff/
  13. spef/
  14. spi/
  15. verilog/
  16. .gitignore
  17. .gitmodules
  18. caravel-tapeout.tar.gz
  19. LICENSE
  20. Makefile
  21. out.log
  22. parser.out
  23. parsetab.py
  24. README.md
  25. requirements.mpw_precheck.txt
README.md

Caravel User Project

License UPRJ_CI Caravel Build

:exclamation: Important Note

OSU gf180mcuC 3.3V standard cell caravel test - ffra

License UPRJ_CI

An 32-bit ffra adder implementation using OSU standard cells

This design is an adder implementation of Anton Blanchard‘s vlsiffra architecture. The purpose of this is to make OpenLane’s gf180mcuC pdk and overall flow compatible with a 3.3V standard cell kit, as well as to test the functionality of OSU's standard cell library for the gf180 process node.

The use of this design is very simple, and should be compatible with any external controller. Caravel's GPIO is setup exclusively with user input settings, so that the IO of the chip and be interacted with directly.