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foss-eda-tools / third_party / shuttle / gf180mcu / mpw-18h1 / slot-001 / 919e7916b4ad14b275bf443883819a002f8b592e
commit919e7916b4ad14b275bf443883819a002f8b592e[log] [tgz]
authorJohan Euphrosine <proppy@google.com>Tue Feb 28 11:39:26 2023 +0900
committerJohan Euphrosine <proppy@google.com>Tue Feb 28 11:41:55 2023 +0900
treea89d13eec8d1ac9d763bb756d38304c16f057bfa
parentc4f5f2c1264a74727c67194aafa30db3c6ce3f3b [diff]
github/workflows: add gds and verilog to precheck artifact
1 file changed
tree: a89d13eec8d1ac9d763bb756d38304c16f057bfa
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. gf180_teststructures/
  6. lef/
  7. lib/
  8. mag/
  9. maglef/
  10. openlane/
  11. sdc/
  12. sdf/
  13. signoff/
  14. spef/
  15. spi/
  16. verilog/
  17. caravel
  18. mgmt_core_wrapper
  19. mpw_precheck
  20. .gitignore
  21. .gitmodules
  22. LICENSE
  23. Makefile
  24. README.md
  25. requirements.mpw_precheck.txt
README.md

Caravel User Project

License UPRJ_CI Caravel Build

:exclamation: Important Note

Please fill in your project documentation in this README.md file

Refer to README for this sample project documentation.