commit d269470c108093be6cea47bd70293e85c42febb6
author james <james@neptune.cassia.ai> Mon Dec 05 15:53:05 2022 -0800
committer james <james@neptune.cassia.ai> Mon Dec 05 15:53:05 2022 -0800
tree 82ae39dae984aad6c51e52a152de6488efde58ce
parent 9d7677f475bcdeeb2f0e6c04a46e755c147a526d

gpio

verilog/rtl/user_defines.v

diff --git a/verilog/rtl/user_defines.v b/verilog/rtl/user_defines.v
index 15da75a..81fa63e 100644
--- a/verilog/rtl/user_defines.v
+++ b/verilog/rtl/user_defines.v
@@ -20,7 +20,7 @@
 `define __USER_DEFINES_H
 
 // deliberately erroneous placeholder value; user required to config GPIO's to other
-`define GPIO_MODE_MGMT_STD_OUTPUT                  13'hffff
+//`define GPIO_MODE_MGMT_STD_OUTPUT                  13'hffff
 
 // Authoritive source of these MODE defs is: caravel/verilog/rtl/user_defines.v
 // Useful GPIO mode values.  These match the names used in defs.h.