tapeout/outputs/drc/caravel_18006e0d_nplus.lyrdb

<?xml version="1.0" encoding="utf-8"?>
<report-database>
 <description>DRC Run Report at</description>
 <original-file/>
 <generator>drc: script='/mnt/shuttles/shuttle/gfmpw-0/u9822_susanao/modulador/tapeout/outputs/drc/nplus.drc'</generator>
 <top-cell>caravel_18006e0d</top-cell>
 <tags>
 </tags>
 <categories>
  <category>
   <name>NP.1</name>
   <description>NP.1 : min. nplus width : 0.4µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.2</name>
   <description>NP.2 : min. nplus spacing : 0.4µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.3a</name>
   <description>NP.3a : Space to PCOMP for PCOMP: (1) Inside Nwell (2) Outside LVPWELL but inside DNWELL. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.3bi</name>
   <description>NP.3bi : Space to PCOMP: For Inside DNWELL, inside LVPWELL:(i) For PCOMP overlap by LVPWELL &lt; 0.43um. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.3bii</name>
   <description>NP.3bii : Space to PCOMP: For Inside DNWELL, inside LVPWELL:(ii) For PCOMP overlap by LVPWELL &gt;= 0.43um. : 0.08µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.3ci</name>
   <description>NP.3ci : Space to PCOMP: For Outside DNWELL:(i) For PCOMP space to Nwell &lt; 0.43um. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.3cii</name>
   <description>NP.3cii : Space to PCOMP: For Outside DNWELL:(ii) For PCOMP space to Nwell &gt;= 0.43um. : 0.08µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.3d</name>
   <description>NP.3d : Min/max space to a butted PCOMP.</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.3e</name>
   <description>NP.3e : Space to related PCOMP edge adjacent to a butting edge.</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.4a</name>
   <description>NP.4a : Space to related P-channel gate at a butting edge parallel to gate. : 0.32µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.4b</name>
   <description>NP.4b : Within 0.32um of channel, space to P-channel gate extension perpendicular to the direction of Poly2.</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.5a</name>
   <description>NP.5a : Overlap of N-channel gate. : 0.23µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.5b</name>
   <description>NP.5b : Extension beyond COMP for the COMP (1) inside LVPWELL (2) outside Nwell and DNWELL. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.5ci</name>
   <description>NP.5ci : Extension beyond COMP: For Inside DNWELL: (i)For Nplus &lt; 0.43um from LVPWELL edge for Nwell or DNWELL tap inside DNWELL. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.5cii</name>
   <description>NP.5cii : Extension beyond COMP: For Inside DNWELL: (ii) For Nplus &gt;= 0.43um from LVPWELL edge for Nwell or DNWELL tap inside DNWELL. : 0.02µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.5di</name>
   <description>NP.5di : Extension beyond COMP: For Outside DNWELL, inside Nwell: (i) For Nwell overlap of Nplus &lt; 0.43um. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.5dii</name>
   <description>NP.5dii : Extension beyond COMP: For Outside DNWELL, inside Nwell: (ii) For Nwell overlap of Nplus &gt;= 0.43um. : 0.02µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.6</name>
   <description>NP.6 : Overlap with NCOMP butted to PCOMP. : 0.22µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.7</name>
   <description>NP.7 : Space to unrelated unsalicided Poly2. : 0.18µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.8a</name>
   <description>NP.8a : Minimum Nplus area (um2). : 0.35µm²</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.8b</name>
   <description>NP.8b : Minimum area enclosed by Nplus (um2). : 0.35µm²</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.9</name>
   <description>NP.9 : Overlap of unsalicided Poly2. : 0.18µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.10</name>
   <description>NP.10 : Overlap of unsalicided COMP. : 0.18µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.11</name>
   <description>NP.11 : Butting Nplus and PCOMP is forbidden within 0.43um of Nwell edge (for outside DNWELL) and of LVPWELL edge (for inside DNWELL case).</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>NP.12</name>
   <description>NP.12 : Overlap with P-channel poly2 gate extension is forbidden within 0.32um of P-channel gate.</description>
   <categories>
   </categories>
  </category>
 </categories>
 <cells>
  <cell>
   <name>caravel_18006e0d</name>
   <variant/>
   <references>
   </references>
  </cell>
 </cells>
 <items>
 </items>
</report-database>