tapeout/outputs/drc/caravel_18005f3a_pplus.lyrdb

<?xml version="1.0" encoding="utf-8"?>
<report-database>
 <description>DRC Run Report at</description>
 <original-file/>
 <generator>drc: script='/mnt/shuttles/shuttle/gfmpw-0/u9820_lpgarci/divider/tapeout/outputs/drc/pplus.drc'</generator>
 <top-cell>caravel_18005f3a</top-cell>
 <tags>
 </tags>
 <categories>
  <category>
   <name>PP.1</name>
   <description>PP.1 : min. pplus width : 0.4µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.2</name>
   <description>PP.2 : min. pplus spacing : 0.4µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.3a</name>
   <description>PP.3a : Space to NCOMP for NCOMP (1) inside LVPWELL (2) outside NWELL and DNWELL. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.3bi</name>
   <description>PP.3bi : Space to NCOMP: For Inside DNWELL. (i) NCOMP space to LVPWELL &gt;= 0.43um. : 0.08µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.3bii</name>
   <description>PP.3bii : Space to NCOMP: For Inside DNWELL. (ii) NCOMP space to LVPWELL &lt; 0.43um. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.3ci</name>
   <description>PP.3ci : Space to NCOMP: For Outside DNWELL, inside Nwell: (i) NWELL Overlap of NCOMP &gt;= 0.43um. : 0.08µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.3cii</name>
   <description>PP.3cii : Space to NCOMP: For Outside DNWELL, inside Nwell: (ii) NWELL Overlap of NCOMP 0.43um. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.3d</name>
   <description>PP.3d : Min/max space to a butted NCOMP.</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.3e</name>
   <description>PP.3e : Space to NCOMP edge adjacent to a butting edge.</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.4a</name>
   <description>PP.4a : Space related to N-channel gate at a butting edge parallel to gate. : 0.32µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.4b</name>
   <description>PP.4b : Within 0.32um of channel, space to N-channel gate extension perpendicular to the direction of Poly2.</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.5a</name>
   <description>PP.5a : Overlap of P-channel gate. : 0.23µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.5b</name>
   <description>PP.5b : Extension beyond COMP for COMP (1) Inside NWELL (2) outside LVPWELL but inside DNWELL. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.5ci</name>
   <description>PP.5ci : Extension beyond COMP: For Inside DNWELL, inside LVPWELL: (i) For LVPWELL overlap of Pplus &gt;= 0.43um for LVPWELL tap. : 0.02µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.5cii</name>
   <description>PP.5cii : Extension beyond COMP: For Inside DNWELL, inside LVPWELL: (ii) For LVPWELL overlap of Pplus &lt; 0.43um for the LVPWELL tap. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.5di</name>
   <description>PP.5di : Extension beyond COMP: For Outside DNWELL (i) For Pplus to NWELL space &gt;= 0.43um for Pfield or LVPWELL tap. : 0.02µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.5dii</name>
   <description>PP.5dii : Extension beyond COMP: For Outside DNWELL (ii) For Pplus to NWELL space &lt; 0.43um for Pfield or LVPWELL tap. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.6</name>
   <description>PP.6 : Overlap with PCOMP butted to NCOMP. : 0.22µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.7</name>
   <description>PP.7 : Space to unrelated unsalicided Poly2. : 0.18µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.8a</name>
   <description>PP.8a : Minimum Pplus area (um2). : 0.35µm²</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.8b</name>
   <description>PP.8b : Minimum area enclosed by Pplus (um2). : 0.35µm²</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.9</name>
   <description>PP.9 : Overlap of unsalicided Poly2. : 0.18µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.10</name>
   <description>PP.10 : Overlap of unsalicided COMP. : 0.18µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.11</name>
   <description>PP.11 : Butting Pplus and NCOMP is forbidden within 0.43um of Nwell edge (for outside DNWELL) and of LVPWELL edge (for inside DNWELL case).</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>PP.12</name>
   <description>PP.12 : Overlap with N-channel Poly2 gate extension is forbidden within 0.32um of N-channel gate.</description>
   <categories>
   </categories>
  </category>
 </categories>
 <cells>
  <cell>
   <name>caravel_18005f3a</name>
   <variant/>
   <references>
   </references>
  </cell>
 </cells>
 <items>
 </items>
</report-database>