blob: d3580532ae1ed87615fe248eebf369593bb30528 [file] [log] [blame]
<?xml version="1.0" encoding="utf-8"?>
<report-database>
<description>DRC Run Report at</description>
<original-file/>
<generator>drc: script='/mnt/shuttles/shuttle/gfmpw-0/u9820_lpgarci/divider/tapeout/outputs/drc/poly2.drc'</generator>
<top-cell>caravel_18005f3a</top-cell>
<tags>
</tags>
<categories>
<category>
<name>PL.1_3.3V</name>
<description>PL.1_3.3V : Interconnect Width (outside PLFUSE). : 0.18µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.1_5V</name>
<description>PL.1_5V : Interconnect Width (outside PLFUSE). : 0.2µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.1a_3.3V</name>
<description>PL.1a_3.3V : Interconnect Width (inside PLFUSE). : 0.18µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.1a_5V</name>
<description>PL.1a_5V : Interconnect Width (inside PLFUSE). : 0.18µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.2_3.3V</name>
<description>PL.2_3.3V : Gate Width (Channel Length). : 0.28µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.2_5V</name>
<description>PL.2_5V : Gate Width (Channel Length).</description>
<categories>
</categories>
</category>
<category>
<name>PL.3a_3.3V</name>
<description>PL.3a_3.3V : Space on COMP/Field. : 0.24µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.3a_5V</name>
<description>PL.3a_5V : Space on COMP/Field. : 0.24µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.4_3.3V</name>
<description>PL.4_3.3V : Extension beyond COMP to form Poly2 end cap. : 0.22µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.4_5V</name>
<description>PL.4_5V : Extension beyond COMP to form Poly2 end cap. : 0.22µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.5a_3.3V</name>
<description>PL.5a_3.3V : Space from field Poly2 to unrelated COMP Spacer from field Poly2 to Guard-ring. : 0.1µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.5a_5V</name>
<description>PL.5a_5V : Space from field Poly2 to unrelated COMP Spacer from field Poly2 to Guard-ring. : 0.3µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.5b_3.3V</name>
<description>PL.5b_3.3V : Space from field Poly2 to related COMP. : 0.1µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.5b_5V</name>
<description>PL.5b_5V : Space from field Poly2 to related COMP. : 0.3µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.6</name>
<description>PL.6 : 90 degree bends on the COMP are not allowed.</description>
<categories>
</categories>
</category>
<category>
<name>PL.7_3.3V</name>
<description>PL.7_3.3V : 45 degree bent gate width : 0.3µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.7_5V</name>
<description>PL.7_5V : 45 degree bent gate width : 0.7µm</description>
<categories>
</categories>
</category>
<category>
<name>PL.9</name>
<description>PL.9 : Poly2 inter connect connecting 3.3V and 5V areas (area inside and outside Dualgate) are not allowed. They shall be done though metal lines only.</description>
<categories>
</categories>
</category>
<category>
<name>PL.11</name>
<description>PL.11 : V5_Xtor must enclose 5V device.</description>
<categories>
</categories>
</category>
<category>
<name>PL.12</name>
<description>PL.12 : V5_Xtor enclose 5V Comp.</description>
<categories>
</categories>
</category>
</categories>
<cells>
<cell>
<name>caravel_18005f3a</name>
<variant/>
<references>
</references>
</cell>
</cells>
<items>
</items>
</report-database>